Commit b7c3a6eb authored by Anshuman Khandual's avatar Anshuman Khandual Committed by Catalin Marinas
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arm64/sysreg: Rename TRBMAR_EL1 fields per auto-gen tools format 



This renames TRBMAR_EL1 register fields per auto-gen tools format without
causing any functional change in the TRBE driver.

Cc: Will Deacon <will@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: kvmarm@lists.linux.dev
Cc: coresight@lists.linaro.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: default avatarAnshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230614065949.146187-6-anshuman.khandual@arm.com


Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 7bb94882

arch/arm64/include/asm/sysreg.h

+4 −6
Original line number Diff line number Diff line
@@ -263,12 +263,10 @@ 
#define TRBSR_EL1_BSC_SHIFT		0

#define TRBSR_EL1_FSC_MASK		GENMASK(5, 0)

#define TRBSR_EL1_FSC_SHIFT		0

#define TRBMAR_SHARE_MASK		GENMASK(1, 0)

#define TRBMAR_SHARE_SHIFT		8

#define TRBMAR_OUTER_MASK		GENMASK(3, 0)

#define TRBMAR_OUTER_SHIFT		4

#define TRBMAR_INNER_MASK		GENMASK(3, 0)

#define TRBMAR_INNER_SHIFT		0

#define TRBMAR_EL1_SH_MASK		GENMASK(9, 8)

#define TRBMAR_EL1_SH_SHIFT		8

#define TRBMAR_EL1_Attr_MASK		GENMASK(7, 0)

#define TRBMAR_EL1_Attr_SHIFT		0

#define TRBTRG_TRG_MASK			GENMASK(31, 0)

#define TRBTRG_TRG_SHIFT		0

#define TRBIDR_FLAG			BIT(5)