Commit b791620c authored by AngeloGioacchino Del Regno's avatar AngeloGioacchino Del Regno Committed by Stephen Boyd
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clk: qcom: gcc-msm8998: Add missing hmss_gpll0_clk_src clock 



To achieve CPR-Hardened functionality this clock must be on: add it
in order to be able to get it managed by the CPR3 driver.

Signed-off-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Link: https://lore.kernel.org/r/20210114221059.483390-5-angelogioacchino.delregno@somainline.org


Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent e9f322f7

drivers/clk/qcom/gcc-msm8998.c

+20 −0
Original line number Diff line number Diff line
@@ -2160,6 +2160,25 @@ static struct clk_branch gcc_hmss_trig_clk = { 
	},

};



static struct freq_tbl ftbl_hmss_gpll0_clk_src[] = {

	F( 300000000, P_GPLL0_OUT_MAIN, 2, 0, 0),

	F( 600000000, P_GPLL0_OUT_MAIN, 1, 0, 0),

	{ }

};



static struct clk_rcg2 hmss_gpll0_clk_src = {

	.cmd_rcgr = 0x4805c,

	.hid_width = 5,

	.parent_map = gcc_parent_map_1,

	.freq_tbl = ftbl_hmss_gpll0_clk_src,

	.clkr.hw.init = &(struct clk_init_data) {

		.name = "hmss_gpll0_clk_src",

		.parent_names = gcc_parent_names_1,

		.num_parents = ARRAY_SIZE(gcc_parent_names_1),

		.ops = &clk_rcg2_ops,

	},

};



static struct clk_branch gcc_mmss_noc_cfg_ahb_clk = {

	.halt_reg = 0x9004,

	.halt_check = BRANCH_HALT,
@@ -2961,6 +2980,7 @@ static struct clk_regmap *gcc_msm8998_clocks[] = { 
	[GCC_MSS_SNOC_AXI_CLK] = &gcc_mss_snoc_axi_clk.clkr,

	[GCC_MSS_MNOC_BIMC_AXI_CLK] = &gcc_mss_mnoc_bimc_axi_clk.clkr,

	[GCC_MMSS_GPLL0_CLK] = &gcc_mmss_gpll0_clk.clkr,

	[HMSS_GPLL0_CLK_SRC] = &hmss_gpll0_clk_src.clkr,

};



static struct gdsc *gcc_msm8998_gdscs[] = {