Loading arch/arm/boot/dts/vexpress-v2m-rs1.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -157,6 +157,7 @@ v2m_timer23: timer@120000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x120000 0x1000>; interrupts = <3>; }; /* DVI I2C bus */ Loading arch/arm/boot/dts/vexpress-v2m.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -156,6 +156,7 @@ v2m_timer23: timer@12000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x12000 0x1000>; interrupts = <3>; }; /* DVI I2C bus */ Loading Loading
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -157,6 +157,7 @@ v2m_timer23: timer@120000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x120000 0x1000>; interrupts = <3>; }; /* DVI I2C bus */ Loading
arch/arm/boot/dts/vexpress-v2m.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -156,6 +156,7 @@ v2m_timer23: timer@12000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x12000 0x1000>; interrupts = <3>; }; /* DVI I2C bus */ Loading