Commit b722cb32 authored by Yi Liu's avatar Yi Liu Committed by Joerg Roedel
Browse files

iommu/vt-d: Rename cap_5lp_support to cap_fl5lp_support 



This renaming better describes it is for first level page table (a.k.a
first stage page table since VT-d spec 3.4).

Signed-off-by: default avatarYi Liu <yi.l.liu@intel.com>
Reviewed-by: default avatarKevin Tian <kevin.tian@intel.com>
Link: https://lore.kernel.org/r/20220916071326.2223901-1-yi.l.liu@intel.com


Signed-off-by: default avatarLu Baolu <baolu.lu@linux.intel.com>
Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent 47598587

drivers/iommu/intel/cap_audit.c

+2 −2
Original line number Diff line number Diff line
@@ -37,7 +37,7 @@ static inline void check_dmar_capabilities(struct intel_iommu *a, 
	MINIMAL_FEATURE_IOMMU(b, ecap, ECAP_MHMV_MASK);

	MINIMAL_FEATURE_IOMMU(b, ecap, ECAP_IRO_MASK);



	CHECK_FEATURE_MISMATCH(a, b, cap, 5lp_support, CAP_FL5LP_MASK);

	CHECK_FEATURE_MISMATCH(a, b, cap, fl5lp_support, CAP_FL5LP_MASK);

	CHECK_FEATURE_MISMATCH(a, b, cap, fl1gp_support, CAP_FL1GP_MASK);

	CHECK_FEATURE_MISMATCH(a, b, cap, read_drain, CAP_RD_MASK);

	CHECK_FEATURE_MISMATCH(a, b, cap, write_drain, CAP_WD_MASK);
@@ -84,7 +84,7 @@ static int cap_audit_hotplug(struct intel_iommu *iommu, enum cap_audit_type type 
		goto out;

	}



	CHECK_FEATURE_MISMATCH_HOTPLUG(iommu, cap, 5lp_support, CAP_FL5LP_MASK);

	CHECK_FEATURE_MISMATCH_HOTPLUG(iommu, cap, fl5lp_support, CAP_FL5LP_MASK);

	CHECK_FEATURE_MISMATCH_HOTPLUG(iommu, cap, fl1gp_support, CAP_FL1GP_MASK);

	CHECK_FEATURE_MISMATCH_HOTPLUG(iommu, cap, read_drain, CAP_RD_MASK);

	CHECK_FEATURE_MISMATCH_HOTPLUG(iommu, cap, write_drain, CAP_WD_MASK);

drivers/iommu/intel/iommu.c

+1 −1
Original line number Diff line number Diff line
@@ -404,7 +404,7 @@ static unsigned long __iommu_calculate_sagaw(struct intel_iommu *iommu) 
{

	unsigned long fl_sagaw, sl_sagaw;



	fl_sagaw = BIT(2) | (cap_5lp_support(iommu->cap) ? BIT(3) : 0);

	fl_sagaw = BIT(2) | (cap_fl5lp_support(iommu->cap) ? BIT(3) : 0);

	sl_sagaw = cap_sagaw(iommu->cap);



	/* Second level only. */

drivers/iommu/intel/iommu.h

+1 −1
Original line number Diff line number Diff line
@@ -146,7 +146,7 @@ 
/*

 * Decoding Capability Register

 */

#define cap_5lp_support(c)	(((c) >> 60) & 1)

#define cap_fl5lp_support(c)	(((c) >> 60) & 1)

#define cap_pi_support(c)	(((c) >> 59) & 1)

#define cap_fl1gp_support(c)	(((c) >> 56) & 1)

#define cap_read_drain(c)	(((c) >> 55) & 1)

drivers/iommu/intel/pasid.c

+1 −1
Original line number Diff line number Diff line
@@ -519,7 +519,7 @@ int intel_pasid_setup_first_level(struct intel_iommu *iommu, 
		}

	}



	if ((flags & PASID_FLAG_FL5LP) && !cap_5lp_support(iommu->cap)) {

	if ((flags & PASID_FLAG_FL5LP) && !cap_fl5lp_support(iommu->cap)) {

		pr_err("No 5-level paging support for first-level on %s\n",

		       iommu->name);

		return -EINVAL;

drivers/iommu/intel/svm.c

+1 −1
Original line number Diff line number Diff line
@@ -164,7 +164,7 @@ void intel_svm_check(struct intel_iommu *iommu) 
	}



	if (cpu_feature_enabled(X86_FEATURE_LA57) &&

	    !cap_5lp_support(iommu->cap)) {

	    !cap_fl5lp_support(iommu->cap)) {

		pr_err("%s SVM disabled, incompatible paging mode\n",

		       iommu->name);

		return;