Commit b6ca556c authored by Marc Zyngier's avatar Marc Zyngier
Browse files

irqchip/apple-aic: Advertise some level of vGICv3 compatibility 



The CPUs in the Apple M1 SoC partially implement a virtual GICv3
CPU interface, although one that is incapable of HW deactivation
of interrupts, nor masking the maintenance interrupt.

Advertise the support to KVM.

Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parent 5f592296

drivers/irqchip/irq-apple-aic.c

+9 −0
Original line number Diff line number Diff line
@@ -50,6 +50,7 @@ 
#include <linux/cpuhotplug.h>

#include <linux/io.h>

#include <linux/irqchip.h>

#include <linux/irqchip/arm-vgic-info.h>

#include <linux/irqdomain.h>

#include <linux/limits.h>

#include <linux/of_address.h>
@@ -787,6 +788,12 @@ static int aic_init_cpu(unsigned int cpu) 
	return 0;

}



static struct gic_kvm_info vgic_info __initdata = {

	.type			= GIC_V3,

	.no_maint_irq_mask	= true,

	.no_hw_deactivation	= true,

};



static int __init aic_of_ic_init(struct device_node *node, struct device_node *parent)

{

	int i;
@@ -843,6 +850,8 @@ static int __init aic_of_ic_init(struct device_node *node, struct device_node *p 
			  "irqchip/apple-aic/ipi:starting",

			  aic_init_cpu, NULL);



	vgic_set_kvm_info(&vgic_info);



	pr_info("Initialized with %d IRQs, %d FIQs, %d vIPIs\n",

		irqc->nr_hw, AIC_NR_FIQ, AIC_NR_SWIPI);