Commit b69d5c7e authored by Hawking Zhang's avatar Hawking Zhang Committed by Alex Deucher
Browse files

drm/amdgpu: support query ecc cap for SIENNA_CICHLID 



driver needs to query umc_info_v3_3 for ecc capability
in sienna_cichlid

Signed-off-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarLikun Gao <Likun.Gao@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent f1a8801c

drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c

+23 −5
Original line number Diff line number Diff line
@@ -117,6 +117,8 @@ union igp_info { 


union umc_info {

	struct atom_umc_info_v3_1 v31;

	struct atom_umc_info_v3_2 v32;

	struct atom_umc_info_v3_3 v33;

};



union vram_info {
@@ -365,13 +367,29 @@ bool amdgpu_atomfirmware_mem_ecc_supported(struct amdgpu_device *adev) 


	if (amdgpu_atom_parse_data_header(mode_info->atom_context,

				index, &size, &frev, &crev, &data_offset)) {

		/* support umc_info 3.1+ */

		if ((frev == 3 && crev >= 1) || (frev > 3)) {

		if (frev == 3) {

			umc_info = (union umc_info *)

				(mode_info->atom_context->bios + data_offset);

			switch (crev) {

			case 1:

				ecc_default_enabled =

					(le32_to_cpu(umc_info->v31.umc_config) &

					 UMC_CONFIG__DEFAULT_MEM_ECC_ENABLE) ? true : false;

				break;

			case 2:

				ecc_default_enabled =

					(le32_to_cpu(umc_info->v32.umc_config) &

					 UMC_CONFIG__DEFAULT_MEM_ECC_ENABLE) ? true : false;

				break;

			case 3:

				ecc_default_enabled =

					(le32_to_cpu(umc_info->v33.umc_config1) &

					 UMC_CONFIG1__ENABLE_ECC_CAPABLE) ? true : false;

				break;

			default:

				/* unsupported crev */

				return false;

			}

		}

	}

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

+2 −2
Original line number Diff line number Diff line
@@ -1963,11 +1963,11 @@ static void amdgpu_ras_check_supported(struct amdgpu_device *adev, 
		return;



	if (amdgpu_atomfirmware_mem_ecc_supported(adev)) {

		dev_info(adev->dev, "HBM ECC is active.\n");

		dev_info(adev->dev, "MEM ECC is active.\n");

		*hw_supported |= (1 << AMDGPU_RAS_BLOCK__UMC |

				1 << AMDGPU_RAS_BLOCK__DF);

	} else

		dev_info(adev->dev, "HBM ECC is not presented.\n");

		dev_info(adev->dev, "MEM ECC is not presented.\n");



	if (amdgpu_atomfirmware_sram_ecc_supported(adev)) {

		dev_info(adev->dev, "SRAM ECC is active.\n");