Commit b671d6ef authored by Imre Deak's avatar Imre Deak
Browse files

drm/i915: Move the initial fastset commit check to encoder hooks



Move the checks to decide whether a fastset is possible during the
initial commit to an encoder hook. This check is really encoder specific
and the next patch will also require this adding a DP encoder specific
check.

v2: Fix negated condition in gen11_dsi_initial_fastset_check().
v3: Make sure to call the hook for all encoders on the crtc. (Ville)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201005215311.1475666-1-imre.deak@intel.com
parent 7a8a95f5
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+14 −0
Original line number Diff line number Diff line
@@ -1668,6 +1668,19 @@ static bool gen11_dsi_get_hw_state(struct intel_encoder *encoder,
	return ret;
}

static bool gen11_dsi_initial_fastset_check(struct intel_encoder *encoder,
					    struct intel_crtc_state *crtc_state)
{
	if (crtc_state->dsc.compression_enable) {
		drm_dbg_kms(encoder->base.dev, "Forcing full modeset due to DSC being enabled\n");
		crtc_state->uapi.mode_changed = true;

		return false;
	}

	return true;
}

static void gen11_dsi_encoder_destroy(struct drm_encoder *encoder)
{
	intel_encoder_destroy(encoder);
@@ -1923,6 +1936,7 @@ void icl_dsi_init(struct drm_i915_private *dev_priv)
	encoder->update_pipe = intel_panel_update_backlight;
	encoder->compute_config = gen11_dsi_compute_config;
	encoder->get_hw_state = gen11_dsi_get_hw_state;
	encoder->initial_fastset_check = gen11_dsi_initial_fastset_check;
	encoder->type = INTEL_OUTPUT_DSI;
	encoder->cloneable = 0;
	encoder->pipe_mask = ~0;
+10 −0
Original line number Diff line number Diff line
@@ -4564,6 +4564,15 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
	intel_read_dp_sdp(encoder, pipe_config, DP_SDP_VSC);
}

static bool intel_ddi_initial_fastset_check(struct intel_encoder *encoder,
					    struct intel_crtc_state *crtc_state)
{
	if (intel_crtc_has_dp_encoder(crtc_state))
		return intel_dp_initial_fastset_check(encoder, crtc_state);

	return true;
}

static enum intel_output_type
intel_ddi_compute_output_type(struct intel_encoder *encoder,
			      struct intel_crtc_state *crtc_state,
@@ -5173,6 +5182,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
	encoder->update_pipe = intel_ddi_update_pipe;
	encoder->get_hw_state = intel_ddi_get_hw_state;
	encoder->get_config = intel_ddi_get_config;
	encoder->initial_fastset_check = intel_ddi_initial_fastset_check;
	encoder->suspend = intel_dp_encoder_suspend;
	encoder->get_power_domains = intel_ddi_get_power_domains;

+11 −16
Original line number Diff line number Diff line
@@ -17957,6 +17957,8 @@ static int intel_initial_commit(struct drm_device *dev)
		}
		if (crtc_state->hw.active) {
			struct intel_encoder *encoder;
			/*
			 * We've not yet detected sink capabilities
			 * (audio,infoframes,etc.) and thus we don't want to
@@ -17978,22 +17980,15 @@ static int intel_initial_commit(struct drm_device *dev)
			 */
			crtc_state->uapi.color_mgmt_changed = true;
			/*
			 * FIXME hack to force full modeset when DSC is being
			 * used.
			 *
			 * As long as we do not have full state readout and
			 * config comparison of crtc_state->dsc, we have no way
			 * to ensure reliable fastset. Remove once we have
			 * readout for DSC.
			 */
			if (crtc_state->dsc.compression_enable) {
			for_each_intel_encoder_mask(dev, encoder,
						    crtc_state->uapi.encoder_mask) {
				if (encoder->initial_fastset_check &&
				    !encoder->initial_fastset_check(encoder, crtc_state)) {
					ret = drm_atomic_add_affected_connectors(state,
										 &crtc->base);
					if (ret)
						goto out;
				crtc_state->uapi.mode_changed = true;
				drm_dbg_kms(dev, "Force full modeset for DSC\n");
				}
			}
		}
	}
+8 −0
Original line number Diff line number Diff line
@@ -187,6 +187,14 @@ struct intel_encoder {
	 * be set correctly before calling this function. */
	void (*get_config)(struct intel_encoder *,
			   struct intel_crtc_state *pipe_config);

	/*
	 * Optional hook, returning true if this encoder allows a fastset
	 * during the initial commit, false otherwise.
	 */
	bool (*initial_fastset_check)(struct intel_encoder *encoder,
				      struct intel_crtc_state *crtc_state);

	/*
	 * Acquires the power domains needed for an active encoder during
	 * hardware state readout.
+22 −0
Original line number Diff line number Diff line
@@ -3703,6 +3703,27 @@ static void intel_dp_get_config(struct intel_encoder *encoder,
	}
}

bool intel_dp_initial_fastset_check(struct intel_encoder *encoder,
				    struct intel_crtc_state *crtc_state)
{
	struct drm_i915_private *i915 = to_i915(encoder->base.dev);

	/*
	 * FIXME hack to force full modeset when DSC is being used.
	 *
	 * As long as we do not have full state readout and config comparison
	 * of crtc_state->dsc, we have no way to ensure reliable fastset.
	 * Remove once we have readout for DSC.
	 */
	if (crtc_state->dsc.compression_enable) {
		drm_dbg_kms(&i915->drm, "Forcing full modeset due to DSC being enabled\n");
		crtc_state->uapi.mode_changed = true;
		return false;
	}

	return true;
}

static void intel_disable_dp(struct intel_atomic_state *state,
			     struct intel_encoder *encoder,
			     const struct intel_crtc_state *old_crtc_state,
@@ -8057,6 +8078,7 @@ bool intel_dp_init(struct drm_i915_private *dev_priv,
	intel_encoder->compute_config = intel_dp_compute_config;
	intel_encoder->get_hw_state = intel_dp_get_hw_state;
	intel_encoder->get_config = intel_dp_get_config;
	intel_encoder->initial_fastset_check = intel_dp_initial_fastset_check;
	intel_encoder->update_pipe = intel_panel_update_backlight;
	intel_encoder->suspend = intel_dp_encoder_suspend;
	if (IS_CHERRYVIEW(dev_priv)) {
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