Commit b5ed7a5c authored by Robert Marko's avatar Robert Marko Committed by Bjorn Andersson
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ARM: dts: qcom: ipq4019: correct SDHCI XO clock 



Using GCC_DCD_XO_CLK as the XO clock for SDHCI controller is not correct,
it seems that I somehow made a mistake of passing it instead of the fixed
XO clock.

Fixes: 04b3b72b ("ARM: dts: qcom: ipq4019: Add SDHCI controller node")
Signed-off-by: default avatarRobert Marko <robert.marko@sartura.hr>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230811110150.229966-1-robert.marko@sartura.hr


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 04601b9b

arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi

+6 −3
Original line number Diff line number Diff line
@@ -230,9 +230,12 @@ 
			interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "hc_irq", "pwr_irq";

			bus-width = <8>;

			clocks = <&gcc GCC_SDCC1_AHB_CLK>, <&gcc GCC_SDCC1_APPS_CLK>,

				 <&gcc GCC_DCD_XO_CLK>;

			clock-names = "iface", "core", "xo";

			clocks = <&gcc GCC_SDCC1_AHB_CLK>,

				 <&gcc GCC_SDCC1_APPS_CLK>,

				 <&xo>;

			clock-names = "iface",

				      "core",

				      "xo";

			status = "disabled";

		};