Commit b5c88f21 authored by David Hildenbrand's avatar David Hildenbrand Committed by Andrew Morton
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microblaze/mm: support __HAVE_ARCH_PTE_SWP_EXCLUSIVE 

Let's support __HAVE_ARCH_PTE_SWP_EXCLUSIVE by stealing one bit from the
type.  Generic MM currently only uses 5 bits for the type
(MAX_SWAPFILES_SHIFT), so the stolen bit is effectively unused.

The shift by 2 when converting between PTE and arch-specific swap entry
makes the swap PTE layout a little bit harder to decipher.

While at it, drop the comment from paulus---copy-and-paste leftover from
powerpc where we actually have _PAGE_HASHPTE---and mask the type in
__swp_entry_to_pte() as well.

Link: https://lkml.kernel.org/r/20230113171026.582290-12-david@redhat.com


Signed-off-by: default avatarDavid Hildenbrand <david@redhat.com>
Cc: Michal Simek <monstr@monstr.eu>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
parent ed415406

arch/m68k/include/asm/mcf_pgtable.h

+2 −2
Original line number Diff line number Diff line
@@ -46,8 +46,8 @@ 
#define _CACHEMASK040		(~0x060)

#define _PAGE_GLOBAL040		0x400   /* 68040 global bit, used for kva descs */



/* We borrow bit 7 to store the exclusive marker in swap PTEs. */

#define _PAGE_SWP_EXCLUSIVE	0x080

/* We borrow bit 24 to store the exclusive marker in swap PTEs. */

#define _PAGE_SWP_EXCLUSIVE	CF_PAGE_NOCACHE



/*

 * Externally used page protection values.

arch/microblaze/include/asm/pgtable.h

+35 −10
Original line number Diff line number Diff line
@@ -131,10 +131,10 @@ extern pte_t *va_to_pte(unsigned long address); 
 * of the 16 available.  Bit 24-26 of the TLB are cleared in the TLB

 * miss handler.  Bit 27 is PAGE_USER, thus selecting the correct

 * zone.

 * - PRESENT *must* be in the bottom two bits because swap cache

 * entries use the top 30 bits.  Because 4xx doesn't support SMP

 * anyway, M is irrelevant so we borrow it for PAGE_PRESENT.  Bit 30

 * is cleared in the TLB miss handler before the TLB entry is loaded.

 * - PRESENT *must* be in the bottom two bits because swap PTEs use the top

 * 30 bits.  Because 4xx doesn't support SMP anyway, M is irrelevant so we

 * borrow it for PAGE_PRESENT.  Bit 30 is cleared in the TLB miss handler

 * before the TLB entry is loaded.

 * - All other bits of the PTE are loaded into TLBLO without

 *  * modification, leaving us only the bits 20, 21, 24, 25, 26, 30 for

 * software PTE bits.  We actually use bits 21, 24, 25, and
@@ -155,6 +155,9 @@ extern pte_t *va_to_pte(unsigned long address); 
#define _PAGE_ACCESSED	0x400	/* software: R: page referenced */

#define _PMD_PRESENT	PAGE_MASK



/* We borrow bit 24 to store the exclusive marker in swap PTEs. */

#define _PAGE_SWP_EXCLUSIVE	_PAGE_DIRTY



/*

 * Some bits are unused...

 */
@@ -393,18 +396,40 @@ static inline unsigned long pmd_page_vaddr(pmd_t pmd) 
extern pgd_t swapper_pg_dir[PTRS_PER_PGD];



/*

 * Encode and decode a swap entry.

 * Note that the bits we use in a PTE for representing a swap entry

 * must not include the _PAGE_PRESENT bit, or the _PAGE_HASHPTE bit

 * (if used).  -- paulus

 * Encode/decode swap entries and swap PTEs. Swap PTEs are all PTEs that

 * are !pte_none() && !pte_present().

 *

 *                         1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 3 3

 *   0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1

 *   <------------------ offset -------------------> E < type -> 0 0

 *

 *   E is the exclusive marker that is not stored in swap entries.

 */

#define __swp_type(entry)		((entry).val & 0x3f)

#define __swp_type(entry)	((entry).val & 0x1f)

#define __swp_offset(entry)	((entry).val >> 6)

#define __swp_entry(type, offset) \

		((swp_entry_t) { (type) | ((offset) << 6) })

		((swp_entry_t) { ((type) & 0x1f) | ((offset) << 6) })

#define __pte_to_swp_entry(pte)	((swp_entry_t) { pte_val(pte) >> 2 })

#define __swp_entry_to_pte(x)	((pte_t) { (x).val << 2 })



#define __HAVE_ARCH_PTE_SWP_EXCLUSIVE

static inline int pte_swp_exclusive(pte_t pte)

{

	return pte_val(pte) & _PAGE_SWP_EXCLUSIVE;

}



static inline pte_t pte_swp_mkexclusive(pte_t pte)

{

	pte_val(pte) |= _PAGE_SWP_EXCLUSIVE;

	return pte;

}



static inline pte_t pte_swp_clear_exclusive(pte_t pte)

{

	pte_val(pte) &= ~_PAGE_SWP_EXCLUSIVE;

	return pte;

}



extern unsigned long iopa(unsigned long addr);



/* Values for nocacheflag and cmode */