Commit b5bf24b9 authored by Alan Cox's avatar Alan Cox Committed by Jeff Garzik
Browse files

[PATCH] hpt37x: Check the enablebits 



Helps for PATA but SATA bridged devices lie and always set all the bits
so will need the error handling fixes from Tejun.

Signed-off-by: default avatarAlan Cox <alan@redhat.com>
Signed-off-by: default avatarJeff Garzik <jeff@garzik.org>
parent 0579e303

drivers/ata/pata_hpt37x.c

+16 −3
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@ 
#include <linux/libata.h>



#define DRV_NAME	"pata_hpt37x"

#define DRV_VERSION	"0.5"

#define DRV_VERSION	"0.5.1"



struct hpt_clock {

	u8	xfer_speed;
@@ -453,6 +453,12 @@ static int hpt37x_pre_reset(struct ata_port *ap) 
{

	u8 scr2, ata66;

	struct pci_dev *pdev = to_pci_dev(ap->host->dev);

	static const struct pci_bits hpt37x_enable_bits[] = {

		{ 0x50, 1, 0x04, 0x04 },

		{ 0x54, 1, 0x04, 0x04 }

	};

	if (!pci_test_config_bits(pdev, &hpt37x_enable_bits[ap->port_no]))

		return -ENOENT;

		

	pci_read_config_byte(pdev, 0x5B, &scr2);

	pci_write_config_byte(pdev, 0x5B, scr2 & ~0x01);
@@ -488,10 +494,17 @@ static void hpt37x_error_handler(struct ata_port *ap) 


static int hpt374_pre_reset(struct ata_port *ap)

{

	static const struct pci_bits hpt37x_enable_bits[] = {

		{ 0x50, 1, 0x04, 0x04 },

		{ 0x54, 1, 0x04, 0x04 }

	};

	u16 mcr3, mcr6;

	u8 ata66;



	struct pci_dev *pdev = to_pci_dev(ap->host->dev);



	if (!pci_test_config_bits(pdev, &hpt37x_enable_bits[ap->port_no]))

		return -ENOENT;

		

	/* Do the extra channel work */

	pci_read_config_word(pdev, 0x52, &mcr3);

	pci_read_config_word(pdev, 0x56, &mcr6);