Commit b58d4eb1 authored by James Morse's avatar James Morse Committed by Borislav Petkov
Browse files

x86/resctrl: Remove architecture copy of mbps_val 



The resctrl arch code provides a second configuration array mbps_val[]
for the MBA software controller.

Since resctrl switched over to allocating and freeing its own array
when needed, nothing uses the arch code version.

Remove it.

Signed-off-by: default avatarJames Morse <james.morse@arm.com>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Reviewed-by: default avatarJamie Iles <quic_jiles@quicinc.com>
Reviewed-by: default avatarShaopeng Tan <tan.shaopeng@fujitsu.com>
Reviewed-by: default avatarReinette Chatre <reinette.chatre@intel.com>
Tested-by: default avatarXin Hao <xhao@linux.alibaba.com>
Tested-by: default avatarShaopeng Tan <tan.shaopeng@fujitsu.com>
Tested-by: default avatarCristian Marussi <cristian.marussi@arm.com>
Link: https://lore.kernel.org/r/20220902154829.30399-11-james.morse@arm.com
parent 6ce1560d

arch/x86/kernel/cpu/resctrl/core.c

+4 −16
Original line number Diff line number Diff line
@@ -397,7 +397,7 @@ struct rdt_domain *rdt_find_domain(struct rdt_resource *r, int id, 
	return NULL;

}



void setup_default_ctrlval(struct rdt_resource *r, u32 *dc, u32 *dm)

static void setup_default_ctrlval(struct rdt_resource *r, u32 *dc)

{

	struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r);

	int i;
@@ -406,18 +406,14 @@ void setup_default_ctrlval(struct rdt_resource *r, u32 *dc, u32 *dm) 
	 * Initialize the Control MSRs to having no control.

	 * For Cache Allocation: Set all bits in cbm

	 * For Memory Allocation: Set b/w requested to 100%

	 * and the bandwidth in MBps to U32_MAX

	 */

	for (i = 0; i < hw_res->num_closid; i++, dc++, dm++) {

	for (i = 0; i < hw_res->num_closid; i++, dc++)

		*dc = r->default_ctrl;

		*dm = MBA_MAX_MBPS;

	}

}



static void domain_free(struct rdt_hw_domain *hw_dom)

{

	kfree(hw_dom->ctrl_val);

	kfree(hw_dom->mbps_val);

	kfree(hw_dom);

}
@@ -426,23 +422,15 @@ static int domain_setup_ctrlval(struct rdt_resource *r, struct rdt_domain *d) 
	struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r);

	struct rdt_hw_domain *hw_dom = resctrl_to_arch_dom(d);

	struct msr_param m;

	u32 *dc, *dm;

	u32 *dc;



	dc = kmalloc_array(hw_res->num_closid, sizeof(*hw_dom->ctrl_val),

			   GFP_KERNEL);

	if (!dc)

		return -ENOMEM;



	dm = kmalloc_array(hw_res->num_closid, sizeof(*hw_dom->mbps_val),

			   GFP_KERNEL);

	if (!dm) {

		kfree(dc);

		return -ENOMEM;

	}



	hw_dom->ctrl_val = dc;

	hw_dom->mbps_val = dm;

	setup_default_ctrlval(r, dc, dm);

	setup_default_ctrlval(r, dc);



	m.low = 0;

	m.high = hw_res->num_closid;

arch/x86/kernel/cpu/resctrl/internal.h

+0 −3
Original line number Diff line number Diff line
@@ -308,14 +308,12 @@ struct mbm_state { 
 *			  a resource

 * @d_resctrl:	Properties exposed to the resctrl file system

 * @ctrl_val:	array of cache or mem ctrl values (indexed by CLOSID)

 * @mbps_val:	When mba_sc is enabled, this holds the bandwidth in MBps

 *

 * Members of this structure are accessed via helpers that provide abstraction.

 */

struct rdt_hw_domain {

	struct rdt_domain		d_resctrl;

	u32				*ctrl_val;

	u32				*mbps_val;

};



static inline struct rdt_hw_domain *resctrl_to_arch_dom(struct rdt_domain *r)
@@ -529,7 +527,6 @@ void mbm_setup_overflow_handler(struct rdt_domain *dom, 
void mbm_handle_overflow(struct work_struct *work);

void __init intel_rdt_mbm_apply_quirk(void);

bool is_mba_sc(struct rdt_resource *r);

void setup_default_ctrlval(struct rdt_resource *r, u32 *dc, u32 *dm);

u32 delay_bw_map(unsigned long bw, struct rdt_resource *r);

void cqm_setup_limbo_handler(struct rdt_domain *dom, unsigned long delay_ms);

void cqm_handle_limbo(struct work_struct *work);

arch/x86/kernel/cpu/resctrl/rdtgroup.c

+1 −3
Original line number Diff line number Diff line
@@ -2370,10 +2370,8 @@ static int reset_all_ctrls(struct rdt_resource *r) 
		hw_dom = resctrl_to_arch_dom(d);

		cpumask_set_cpu(cpumask_any(&d->cpu_mask), cpu_mask);



		for (i = 0; i < hw_res->num_closid; i++) {

		for (i = 0; i < hw_res->num_closid; i++)

			hw_dom->ctrl_val[i] = r->default_ctrl;

			hw_dom->mbps_val[i] = MBA_MAX_MBPS;

		}

	}

	cpu = get_cpu();

	/* Update CBM on this cpu if it's in cpu_mask. */