Commit b4bbb95e authored by Anup Patel's avatar Anup Patel Committed by Anup Patel
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RISC-V: KVM: Add Sv57x4 mode support for G-stage 



Latest QEMU supports G-stage Sv57x4 mode so this patch extends KVM
RISC-V G-stage handling to detect and use Sv57x4 mode when available.

Signed-off-by: default avatarAnup Patel <apatel@ventanamicro.com>
Reviewed-by: default avatarAtish Patra <atishp@rivosinc.com>
Signed-off-by: default avatarAnup Patel <anup@brainfault.org>
parent 26708234

arch/riscv/include/asm/csr.h

+1 −0
Original line number Diff line number Diff line
@@ -117,6 +117,7 @@ 
#define HGATP_MODE_SV32X4	_AC(1, UL)

#define HGATP_MODE_SV39X4	_AC(8, UL)

#define HGATP_MODE_SV48X4	_AC(9, UL)

#define HGATP_MODE_SV57X4	_AC(10, UL)



#define HGATP32_MODE_SHIFT	31

#define HGATP32_VMID_SHIFT	22

arch/riscv/kvm/main.c

+3 −0
Original line number Diff line number Diff line
@@ -105,6 +105,9 @@ int kvm_arch_init(void *opaque) 
	case HGATP_MODE_SV48X4:

		str = "Sv48x4";

		break;

	case HGATP_MODE_SV57X4:

		str = "Sv57x4";

		break;

	default:

		return -ENODEV;

	}

arch/riscv/kvm/mmu.c

+10 −1
Original line number Diff line number Diff line
@@ -751,14 +751,23 @@ void kvm_riscv_gstage_update_hgatp(struct kvm_vcpu *vcpu) 
void kvm_riscv_gstage_mode_detect(void)

{

#ifdef CONFIG_64BIT

	/* Try Sv57x4 G-stage mode */

	csr_write(CSR_HGATP, HGATP_MODE_SV57X4 << HGATP_MODE_SHIFT);

	if ((csr_read(CSR_HGATP) >> HGATP_MODE_SHIFT) == HGATP_MODE_SV57X4) {

		gstage_mode = (HGATP_MODE_SV57X4 << HGATP_MODE_SHIFT);

		gstage_pgd_levels = 5;

		goto skip_sv48x4_test;

	}



	/* Try Sv48x4 G-stage mode */

	csr_write(CSR_HGATP, HGATP_MODE_SV48X4 << HGATP_MODE_SHIFT);

	if ((csr_read(CSR_HGATP) >> HGATP_MODE_SHIFT) == HGATP_MODE_SV48X4) {

		gstage_mode = (HGATP_MODE_SV48X4 << HGATP_MODE_SHIFT);

		gstage_pgd_levels = 4;

	}

	csr_write(CSR_HGATP, 0);

skip_sv48x4_test:



	csr_write(CSR_HGATP, 0);

	__kvm_riscv_hfence_gvma_all();

#endif

}