Commit b4751afb authored by Michael Walle's avatar Michael Walle Committed by Shawn Guo
Browse files

arm64: dts: ls1028a: move pixel clock pll into /soc 



Move it inside the /soc subnode because it is part of the CCSR space.

Signed-off-by: default avatarMichael Walle <michael@walle.cc>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 0c8bedf2

arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi

+7 −7
Original line number Diff line number Diff line
@@ -80,13 +80,6 @@ 
		clock-output-names = "phy_27m";

	};



	dpclk: clock-controller@f1f0000 {

		compatible = "fsl,ls1028a-plldig";

		reg = <0x0 0xf1f0000 0x0 0xffff>;

		#clock-cells = <0>;

		clocks = <&osc_27m>;

	};



	firmware {

		optee: optee  {

			compatible = "linaro,optee-tz";
@@ -926,6 +919,13 @@ 
			status = "disabled";

		};



		dpclk: clock-controller@f1f0000 {

			compatible = "fsl,ls1028a-plldig";

			reg = <0x0 0xf1f0000 0x0 0x10000>;

			#clock-cells = <0>;

			clocks = <&osc_27m>;

		};



		tmu: tmu@1f80000 {

			compatible = "fsl,qoriq-tmu";

			reg = <0x0 0x1f80000 0x0 0x10000>;