Commit b44fac86 authored by Wenpeng Liang's avatar Wenpeng Liang Committed by Zheng Zengkai
Browse files

RDMA/hns: Add XRC subtype in QPC and XRC type in SRQC 

mainline inclusion
from mainline-v5.12-rc1
commit 495c2480
category: feature
bugzilla: 174002
CVE:NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=495c24808ce71429d6c746390e5798896fc4ad88

----------------------------------------------------------------------

A field to distuiguish basic SRQ from XRC SRQ in SRQC and a field in QPC
to determine whether a QP is XRC TGT QP or XRC INI QP are missing.

Fixes: 32548870 ("RDMA/hns: Add support for XRC on HIP09")
Link: https://lore.kernel.org/r/1617354454-47840-8-git-send-email-liweihang@huawei.com


Signed-off-by: default avatarWenpeng Liang <liangwenpeng@huawei.com>
Signed-off-by: default avatarWeihang Li <liweihang@huawei.com>
Signed-off-by: default avatarJason Gunthorpe <jgg@nvidia.com>
Signed-off-by: default avatarwangsirong <wangsirong@huawei.com>
Reviewed-by: default avatarChunZhi Hu <huchunzhi@huawei.com>
Signed-off-by: default avatarZheng Zengkai <zhengzengkai@huawei.com>
parent c6d0ff17

drivers/infiniband/hw/hns/hns_roce_hw_v2.c

+7 −6
Original line number Diff line number Diff line
@@ -4100,9 +4100,13 @@ static void modify_qp_reset_to_init(struct ib_qp *ibqp, 
	roce_set_field(context->byte_24_mtu_tc, V2_QPC_BYTE_24_VLAN_ID_M,

		       V2_QPC_BYTE_24_VLAN_ID_S, 0xfff);



	if (ibqp->qp_type == IB_QPT_XRC_TGT)

	if (ibqp->qp_type == IB_QPT_XRC_TGT) {

		context->qkey_xrcd = cpu_to_le32(hr_qp->xrcdn);



		roce_set_bit(context->byte_80_rnr_rx_cqn,

			     V2_QPC_BYTE_80_XRC_QP_TYPE_S, 1);

	}



	if (hr_qp->en_flags & HNS_ROCE_QP_CAP_RQ_RECORD_DB)

		roce_set_bit(context->byte_68_rq_db,

			     V2_QPC_BYTE_68_RQ_RECORD_EN_S, 1);
@@ -4160,11 +4164,6 @@ static void modify_qp_init_to_init(struct ib_qp *ibqp, 
	roce_set_field(qpc_mask->byte_4_sqpn_tst, V2_QPC_BYTE_4_TST_M,

		       V2_QPC_BYTE_4_TST_S, 0);



	if (ibqp->qp_type == IB_QPT_XRC_TGT) {

		context->qkey_xrcd = cpu_to_le32(hr_qp->xrcdn);

		qpc_mask->qkey_xrcd = 0;

	}



	roce_set_field(context->byte_16_buf_ba_pg_sz, V2_QPC_BYTE_16_PD_M,

		       V2_QPC_BYTE_16_PD_S, get_pdn(ibqp->pd));
@@ -5594,6 +5593,8 @@ static int hns_roce_v2_write_srqc(struct hns_roce_srq *srq, void *mb_buf) 
	}



	hr_reg_write(ctx, SRQC_SRQ_ST, 1);

	hr_reg_write(ctx, SRQC_SRQ_TYPE,

		     !!(srq->ibsrq.srq_type == IB_SRQT_XRC));

	hr_reg_write(ctx, SRQC_PD, to_hr_pd(srq->ibsrq.pd)->pdn);

	hr_reg_write(ctx, SRQC_SRQN, srq->srqn);

	hr_reg_write(ctx, SRQC_XRCD, srq->xrcdn);

drivers/infiniband/hw/hns/hns_roce_hw_v2.h

+4 −1
Original line number Diff line number Diff line
@@ -414,7 +414,8 @@ struct hns_roce_srq_context { 
#define SRQC_CONSUMER_IDX SRQC_FIELD_LOC(127, 112)

#define SRQC_WQE_BT_BA_L SRQC_FIELD_LOC(159, 128)

#define SRQC_WQE_BT_BA_H SRQC_FIELD_LOC(188, 160)

#define SRQC_RSV2 SRQC_FIELD_LOC(191, 189)

#define SRQC_RSV2 SRQC_FIELD_LOC(190, 189)

#define SRQC_SRQ_TYPE SRQC_FIELD_LOC(191, 191)

#define SRQC_PD SRQC_FIELD_LOC(215, 192)

#define SRQC_RQWS SRQC_FIELD_LOC(219, 216)

#define SRQC_RSV3 SRQC_FIELD_LOC(223, 220)
@@ -714,6 +715,8 @@ struct hns_roce_v2_qp_context { 
#define	V2_QPC_BYTE_80_RX_CQN_S 0

#define V2_QPC_BYTE_80_RX_CQN_M GENMASK(23, 0)



#define V2_QPC_BYTE_80_XRC_QP_TYPE_S 24



#define	V2_QPC_BYTE_80_MIN_RNR_TIME_S 27

#define V2_QPC_BYTE_80_MIN_RNR_TIME_M GENMASK(31, 27)