Commit b4351123 authored by Sebastian Reichel's avatar Sebastian Reichel Committed by Vinod Koul
Browse files

phy: phy-rockchip-inno-usb2: simplify phy clock handling



Simplify phyclk handling by using devm_clk_get_optional_enabled to
acquire and enable the optional clock. This also fixes a resource
leak in driver remove path and adds proper error handling.

Signed-off-by: default avatarSebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230522170324.61349-6-sebastian.reichel@collabora.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 5ae6224b
Loading
Loading
Loading
Loading
+6 −13
Original line number Diff line number Diff line
@@ -1390,24 +1390,22 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
	if (IS_ERR(rphy->phy_reset))
		return PTR_ERR(rphy->phy_reset);

	rphy->clk = of_clk_get_by_name(np, "phyclk");
	if (!IS_ERR(rphy->clk)) {
		clk_prepare_enable(rphy->clk);
	} else {
		dev_info(&pdev->dev, "no phyclk specified\n");
		rphy->clk = NULL;
	rphy->clk = devm_clk_get_optional_enabled(dev, "phyclk");
	if (IS_ERR(rphy->clk)) {
		return dev_err_probe(&pdev->dev, PTR_ERR(rphy->clk),
				     "failed to get phyclk\n");
	}

	ret = rockchip_usb2phy_clk480m_register(rphy);
	if (ret) {
		dev_err(dev, "failed to register 480m output clock\n");
		goto disable_clks;
		return ret;
	}

	if (rphy->phy_cfg->phy_tuning) {
		ret = rphy->phy_cfg->phy_tuning(rphy);
		if (ret)
			goto disable_clks;
			return ret;
	}

	index = 0;
@@ -1470,11 +1468,6 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)

put_child:
	of_node_put(child_np);
disable_clks:
	if (rphy->clk) {
		clk_disable_unprepare(rphy->clk);
		clk_put(rphy->clk);
	}
	return ret;
}