Commit b42d103b authored Feb 22, 2023 by Ian Rogers Committed by Arnaldo Carvalho de Melo Feb 27, 2023

perf vendor events intel: Update alderlaken to v1.19

Update alderlaken perf json from v1.18 to v1.19.

Based on:

https://github.com/intel/perfmon/pull/58

perf JSON files created using:

https://github.com/intel/perfmon/blob/main/scripts/create_perf_json.py



Signed-off-by: Ian Rogers <irogers@google.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Edward Baker <edward.baker@intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Xing Zhengjun <zhengjun.xing@linux.intel.com>
Link: https://lore.kernel.org/r/20230223055306.296179-3-irogers@google.com


Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>

parent b0365c14

tools/perf/pmu-events/arch/x86/alderlaken/memory.json

+7 −0

Original line number	Diff line number	Diff line
		@@ -13,6 +13,13 @@
		"SampleAfterValue": "1000003",
		"UMask": "0xf4"
		},
		{
		"BriefDescription": "Counts the number of cycles that the head (oldest load) of the load buffer and retirement are both stalled due to a DL1 miss.",
		"EventCode": "0x05",
		"EventName": "LD_HEAD.L1_MISS_AT_RET",
		"SampleAfterValue": "1000003",
		"UMask": "0x81"
		},
		{
		"BriefDescription": "Counts the number of cycles that the head (oldest load) of the load buffer and retirement are both stalled due to other block cases.",
		"EventCode": "0x05",

tools/perf/pmu-events/arch/x86/mapfile.csv

+1 −1

Original line number	Diff line number	Diff line
		Family-model,Version,Filename,EventType
		GenuineIntel-6-(97\|9A\|B7\|BA\|BF),v1.19,alderlake,core
		GenuineIntel-6-BE,v1.18,alderlaken,core
		GenuineIntel-6-BE,v1.19,alderlaken,core
		GenuineIntel-6-(1C\|26\|27\|35\|36),v4,bonnell,core
		GenuineIntel-6-(3D\|47),v26,broadwell,core
		GenuineIntel-6-56,v7,broadwellde,core