Commit b3bcd583 authored by Konrad Dybcio's avatar Konrad Dybcio Committed by Rob Clark
Browse files

drm/msm/a6xx: Use adreno_is_aXYZ macros in speedbin matching 



Before transitioning to using per-SoC and not per-Adreno speedbin
fuse values (need another patchset to land elsewhere), a good
improvement/stopgap solution is to use adreno_is_aXYZ macros in
place of explicit revision matching. Do so to allow differentiating
between A619 and A619_holi.

Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarAkhil P Oommen <quic_akhilpo@quicinc.com>
Signed-off-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/542777/


Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent ac926549

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

+9 −9
Original line number Diff line number Diff line
@@ -2269,23 +2269,23 @@ static u32 adreno_7c3_get_speed_bin(u32 fuse) 
	return UINT_MAX;

}



static u32 fuse_to_supp_hw(struct device *dev, struct adreno_rev rev, u32 fuse)

static u32 fuse_to_supp_hw(struct device *dev, struct adreno_gpu *adreno_gpu, u32 fuse)

{

	u32 val = UINT_MAX;



	if (adreno_cmp_rev(ADRENO_REV(6, 1, 8, ANY_ID), rev))

	if (adreno_is_a618(adreno_gpu))

		val = a618_get_speed_bin(fuse);



	else if (adreno_cmp_rev(ADRENO_REV(6, 1, 9, ANY_ID), rev))

	else if (adreno_is_a619(adreno_gpu))

		val = a619_get_speed_bin(fuse);



	else if (adreno_cmp_rev(ADRENO_REV(6, 3, 5, ANY_ID), rev))

	else if (adreno_is_7c3(adreno_gpu))

		val = adreno_7c3_get_speed_bin(fuse);



	else if (adreno_cmp_rev(ADRENO_REV(6, 4, 0, ANY_ID), rev))

	else if (adreno_is_a640(adreno_gpu))

		val = a640_get_speed_bin(fuse);



	else if (adreno_cmp_rev(ADRENO_REV(6, 5, 0, ANY_ID), rev))

	else if (adreno_is_a650(adreno_gpu))

		val = a650_get_speed_bin(fuse);



	if (val == UINT_MAX) {
@@ -2298,7 +2298,7 @@ static u32 fuse_to_supp_hw(struct device *dev, struct adreno_rev rev, u32 fuse) 
	return (1 << val);

}



static int a6xx_set_supported_hw(struct device *dev, struct adreno_rev rev)

static int a6xx_set_supported_hw(struct device *dev, struct adreno_gpu *adreno_gpu)

{

	u32 supp_hw;

	u32 speedbin;
@@ -2317,7 +2317,7 @@ static int a6xx_set_supported_hw(struct device *dev, struct adreno_rev rev) 
		return ret;

	}



	supp_hw = fuse_to_supp_hw(dev, rev, speedbin);

	supp_hw = fuse_to_supp_hw(dev, adreno_gpu, speedbin);



	ret = devm_pm_opp_set_supported_hw(dev, &supp_hw, 1);

	if (ret)
@@ -2438,7 +2438,7 @@ struct msm_gpu *a6xx_gpu_init(struct drm_device *dev) 


	a6xx_llc_slices_init(pdev, a6xx_gpu);



	ret = a6xx_set_supported_hw(&pdev->dev, config->rev);

	ret = a6xx_set_supported_hw(&pdev->dev, adreno_gpu);

	if (ret) {

		a6xx_destroy(&(a6xx_gpu->base.base));

		return ERR_PTR(ret);

drivers/gpu/drm/msm/adreno/adreno_gpu.h

+12 −3
Original line number Diff line number Diff line
@@ -279,10 +279,9 @@ static inline int adreno_is_a630(const struct adreno_gpu *gpu) 
	return adreno_is_revn(gpu, 630);

}



static inline int adreno_is_a640_family(const struct adreno_gpu *gpu)

static inline int adreno_is_a640(const struct adreno_gpu *gpu)

{

	return adreno_is_revn(gpu, 640) ||

		adreno_is_revn(gpu, 680);

	return adreno_is_revn(gpu, 640);

}



static inline int adreno_is_a650(const struct adreno_gpu *gpu)
@@ -301,6 +300,11 @@ static inline int adreno_is_a660(const struct adreno_gpu *gpu) 
	return adreno_is_revn(gpu, 660);

}



static inline int adreno_is_a680(const struct adreno_gpu *gpu)

{

	return adreno_is_revn(gpu, 680);

}



static inline int adreno_is_a690(const struct adreno_gpu *gpu)

{

	return adreno_is_revn(gpu, 690);
@@ -328,6 +332,11 @@ static inline int adreno_is_a650_family(const struct adreno_gpu *gpu) 
		adreno_is_a660_family(gpu);

}



static inline int adreno_is_a640_family(const struct adreno_gpu *gpu)

{

	return adreno_is_a640(gpu) || adreno_is_a680(gpu);

}



u64 adreno_private_address_space_size(struct msm_gpu *gpu);

int adreno_get_param(struct msm_gpu *gpu, struct msm_file_private *ctx,

		     uint32_t param, uint64_t *value, uint32_t *len);