Commit b3304591 authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915/dp: Track pm_qos per connector 



Since multiple connectors may run intel_dp_aux_xfer conncurrently, a
single global pm_qos does not suffice. (One connector may disable the
dma-latency boost prematurely while the second is still depending on
it.) Instead of a single global pm_qos, track the pm_qos request for
each intel_dp.

v2: Move the pm_qos setup/teardown to intel_dp_aux_init/fini

Fixes: 9ee32fea ("drm/i915: irq-drive the dp aux communication")
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: default avatarImre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201230202309.23982-1-chris@chris-wilson.co.uk
parent 021a3ac2

drivers/gpu/drm/i915/display/intel_display_types.h

+3 −0
Original line number Diff line number Diff line
@@ -1455,6 +1455,9 @@ struct intel_dp { 
		bool ycbcr_444_to_420;

	} dfp;



	/* To control wakeup latency, e.g. for irq-driven dp aux transfers. */

	struct pm_qos_request pm_qos;



	/* Display stream compression testing */

	bool force_dsc_en;

drivers/gpu/drm/i915/display/intel_dp.c

+6 −2
Original line number Diff line number Diff line
@@ -1489,7 +1489,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp, 
	 * lowest possible wakeup latency and so prevent the cpu from going into

	 * deep sleep states.

	 */

	cpu_latency_qos_update_request(&i915->pm_qos, 0);

	cpu_latency_qos_update_request(&intel_dp->pm_qos, 0);



	intel_dp_check_edp(intel_dp);
@@ -1622,7 +1622,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp, 


	ret = recv_bytes;

out:

	cpu_latency_qos_update_request(&i915->pm_qos, PM_QOS_DEFAULT_VALUE);

	cpu_latency_qos_update_request(&intel_dp->pm_qos, PM_QOS_DEFAULT_VALUE);



	if (vdd)

		edp_panel_vdd_off(intel_dp, false);
@@ -1898,6 +1898,9 @@ static i915_reg_t tgl_aux_data_reg(struct intel_dp *intel_dp, int index) 
static void

intel_dp_aux_fini(struct intel_dp *intel_dp)

{

	if (cpu_latency_qos_request_active(&intel_dp->pm_qos))

		cpu_latency_qos_remove_request(&intel_dp->pm_qos);



	kfree(intel_dp->aux.name);

}
@@ -1950,6 +1953,7 @@ intel_dp_aux_init(struct intel_dp *intel_dp) 
					       encoder->base.name);



	intel_dp->aux.transfer = intel_dp_aux_transfer;

	cpu_latency_qos_add_request(&intel_dp->pm_qos, PM_QOS_DEFAULT_VALUE);

}



bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp)

drivers/gpu/drm/i915/i915_drv.c

+0 −5
Original line number Diff line number Diff line
@@ -578,8 +578,6 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv) 


	pci_set_master(pdev);



	cpu_latency_qos_add_request(&dev_priv->pm_qos, PM_QOS_DEFAULT_VALUE);



	intel_gt_init_workarounds(dev_priv);



	/* On the 945G/GM, the chipset reports the MSI capability on the
@@ -626,7 +624,6 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv) 
err_msi:

	if (pdev->msi_enabled)

		pci_disable_msi(pdev);

	cpu_latency_qos_remove_request(&dev_priv->pm_qos);

err_mem_regions:

	intel_memory_regions_driver_release(dev_priv);

err_ggtt:
@@ -648,8 +645,6 @@ static void i915_driver_hw_remove(struct drm_i915_private *dev_priv) 


	if (pdev->msi_enabled)

		pci_disable_msi(pdev);



	cpu_latency_qos_remove_request(&dev_priv->pm_qos);

}



/**

drivers/gpu/drm/i915/i915_drv.h

+0 −3
Original line number Diff line number Diff line
@@ -892,9 +892,6 @@ struct drm_i915_private { 


	bool display_irqs_enabled;



	/* To control wakeup latency, e.g. for irq-driven dp aux transfers. */

	struct pm_qos_request pm_qos;



	/* Sideband mailbox protection */

	struct mutex sb_lock;

	struct pm_qos_request sb_qos;