Commit b2c4caf3 authored by Marc Zyngier's avatar Marc Zyngier
Browse files

Merge branch kvm-arm64/wfxt into kvmarm-master/next 



* kvm-arm64/wfxt:
  : .
  : Add support for the WFET/WFIT instructions that provide the same
  : service as WFE/WFI, only with a timeout.
  : .
  KVM: arm64: Expose the WFXT feature to guests
  KVM: arm64: Offer early resume for non-blocking WFxT instructions
  KVM: arm64: Handle blocking WFIT instruction
  KVM: arm64: Introduce kvm_counter_compute_delta() helper
  KVM: arm64: Simplify kvm_cpu_has_pending_timer()
  arm64: Use WFxT for __delay() when possible
  arm64: Add wfet()/wfit() helpers
  arm64: Add HWCAP advertising FEAT_WFXT
  arm64: Add RV and RN fields for ESR_ELx_WFx_ISS
  arm64: Expand ESR_ELx_WFx_ISS_TI to match its ARMv8.7 definition

Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parents 4b88524c 06e0b802

Documentation/arm64/cpu-feature-registers.rst

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Original line number Diff line number Diff line
@@ -290,6 +290,8 @@ infrastructure: 
     +------------------------------+---------+---------+

     | RPRES                        | [7-4]   |    y    |

     +------------------------------+---------+---------+

     | WFXT                         | [3-0]   |    y    |

     +------------------------------+---------+---------+





Appendix I: Example

Documentation/arm64/elf_hwcaps.rst

+4 −0
Original line number Diff line number Diff line
@@ -297,6 +297,10 @@ HWCAP2_SME_FA64 


    Functionality implied by ID_AA64SMFR0_EL1.FA64 == 0b1.



HWCAP2_WFXT



    Functionality implied by ID_AA64ISAR2_EL1.WFXT == 0b0010.



4. Unused AT_HWCAP bits

-----------------------

arch/arm64/include/asm/barrier.h

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Original line number Diff line number Diff line
@@ -16,7 +16,11 @@ 


#define sev()		asm volatile("sev" : : : "memory")

#define wfe()		asm volatile("wfe" : : : "memory")

#define wfet(val)	asm volatile("msr s0_3_c1_c0_0, %0"	\

				     : : "r" (val) : "memory")

#define wfi()		asm volatile("wfi" : : : "memory")

#define wfit(val)	asm volatile("msr s0_3_c1_c0_1, %0"	\

				     : : "r" (val) : "memory")



#define isb()		asm volatile("isb" : : : "memory")

#define dmb(opt)	asm volatile("dmb " #opt : : : "memory")

arch/arm64/include/asm/esr.h

+6 −2
Original line number Diff line number Diff line
@@ -135,7 +135,10 @@ 
#define ESR_ELx_CV		(UL(1) << 24)

#define ESR_ELx_COND_SHIFT	(20)

#define ESR_ELx_COND_MASK	(UL(0xF) << ESR_ELx_COND_SHIFT)

#define ESR_ELx_WFx_ISS_TI	(UL(1) << 0)

#define ESR_ELx_WFx_ISS_RN	(UL(0x1F) << 5)

#define ESR_ELx_WFx_ISS_RV	(UL(1) << 2)

#define ESR_ELx_WFx_ISS_TI	(UL(3) << 0)

#define ESR_ELx_WFx_ISS_WFxT	(UL(2) << 0)

#define ESR_ELx_WFx_ISS_WFI	(UL(0) << 0)

#define ESR_ELx_WFx_ISS_WFE	(UL(1) << 0)

#define ESR_ELx_xVC_IMM_MASK	((1UL << 16) - 1)
@@ -148,7 +151,8 @@ 
#define DISR_EL1_ESR_MASK	(ESR_ELx_AET | ESR_ELx_EA | ESR_ELx_FSC)



/* ESR value templates for specific events */

#define ESR_ELx_WFx_MASK	(ESR_ELx_EC_MASK | ESR_ELx_WFx_ISS_TI)

#define ESR_ELx_WFx_MASK	(ESR_ELx_EC_MASK |			\

				 (ESR_ELx_WFx_ISS_TI & ~ESR_ELx_WFx_ISS_WFxT))

#define ESR_ELx_WFx_WFI_VAL	((ESR_ELx_EC_WFx << ESR_ELx_EC_SHIFT) |	\

				 ESR_ELx_WFx_ISS_WFI)

arch/arm64/include/asm/hwcap.h

+1 −0
Original line number Diff line number Diff line
@@ -117,6 +117,7 @@ 
#define KERNEL_HWCAP_SME_B16F32		__khwcap2_feature(SME_B16F32)

#define KERNEL_HWCAP_SME_F32F32		__khwcap2_feature(SME_F32F32)

#define KERNEL_HWCAP_SME_FA64		__khwcap2_feature(SME_FA64)

#define KERNEL_HWCAP_WFXT		__khwcap2_feature(WFXT)



/*

 * This yields a mask that user programs can use to figure out what