Commit b2490044 authored by Ashutosh Dixit's avatar Ashutosh Dixit Committed by Anshuman Gupta
Browse files

drm/i915/pmu: Drop redundant IS_VALLEYVIEW check in __get_rc6() 



Because VLV_GT_RENDER_RC6 == GEN6_GT_GFX_RC6, the IS_VALLEYVIEW() check is
not needed. Neither is the check present in other code paths which call
intel_rc6_residency_ns() (in functions gen6_drpc(), rc6_residency() and
rc6_residency_ms_show()).

v2: Elimintate VLV_GT_RENDER_RC6 #define (Jani)

Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: default avatarAshutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: default avatarBadal Nilawar <badal.nilawar@intel.com>
Signed-off-by: default avatarAnshuman Gupta <anshuman.gupta@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220314161310.6468-1-ashutosh.dixit@intel.com
parent 92bc908a

drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c

+1 −1
Original line number Diff line number Diff line
@@ -113,7 +113,7 @@ static int vlv_drpc(struct seq_file *m) 
	seq_printf(m, "Media Power Well: %s\n",

		   (pw_status & VLV_GTLC_PW_MEDIA_STATUS_MASK) ? "Up" : "Down");



	print_rc6_res(m, "Render RC6 residency since boot:", VLV_GT_RENDER_RC6);

	print_rc6_res(m, "Render RC6 residency since boot:", GEN6_GT_GFX_RC6);

	print_rc6_res(m, "Media RC6 residency since boot:", VLV_GT_MEDIA_RC6);



	return fw_domains_show(m, NULL);

drivers/gpu/drm/i915/gt/intel_gt_regs.h

+0 −1
Original line number Diff line number Diff line
@@ -1433,7 +1433,6 @@ 
#define   VLV_MEDIA_RC6_COUNT_EN		(1 << 1)

#define   VLV_RENDER_RC6_COUNT_EN		(1 << 0)

#define GEN6_GT_GFX_RC6				_MMIO(0x138108)

#define VLV_GT_RENDER_RC6			_MMIO(0x138108)

#define VLV_GT_MEDIA_RC6			_MMIO(0x13810c)



#define GEN6_GT_GFX_RC6p			_MMIO(0x13810c)

drivers/gpu/drm/i915/i915_pmu.c

+1 −4
Original line number Diff line number Diff line
@@ -148,10 +148,7 @@ static u64 __get_rc6(struct intel_gt *gt) 
	struct drm_i915_private *i915 = gt->i915;

	u64 val;



	val = intel_rc6_residency_ns(&gt->rc6,

				     IS_VALLEYVIEW(i915) ?

				     VLV_GT_RENDER_RC6 :

				     GEN6_GT_GFX_RC6);

	val = intel_rc6_residency_ns(&gt->rc6, GEN6_GT_GFX_RC6);



	if (HAS_RC6p(i915))

		val += intel_rc6_residency_ns(&gt->rc6, GEN6_GT_GFX_RC6p);