h8300: remove stale bindings and symlink

Renesas H8S2678 PLL clock

This device is Clock multiplyer

Required Properties:

  - compatible: Must be "renesas,h8s2678-pll-clock"

  - clocks: Reference to the parent clocks

  - #clock-cells: Must be 0

  - reg: Two rate selector (Multiply / Divide) register address

Example

-------

		pllclk: pllclk {

			compatible = "renesas,h8s2678-pll-clock";

			clocks = <&xclk>;

			#clock-cells = <0>;

			reg = <0xfee03b 2>, <0xfee045 2>;

		};

* Renesas H8/300 16bit timer

The 16bit timer is a 16bit timer/counter with configurable clock inputs and

programmable compare match.

Required Properties:

  - compatible: must contain "renesas,16bit-timer"

  - reg: base address and length of the registers block for the timer module.

  - interrupts: interrupt-specifier for the timer, IMIA

  - clocks: a list of phandle, one for each entry in clock-names.

  - clock-names: must contain "peripheral_clk" for the functional clock.

  - renesas,channel: timer channel number.

Example:

	timer16: timer@ffff68 {

		compatible = "reneas,16bit-timer";

		reg = <0xffff68 8>, <0xffff60 8>;

		interrupts = <24>;

		renesas,channel = <0>;

		clocks = <&pclk>;

		clock-names = "peripheral_clk";

	};

* Renesas H8/300 8bit timer

The 8bit timer is a 8bit timer/counter with configurable clock inputs and

programmable compare match.

This implement only supported cascade mode.

Required Properties:

  - compatible: must contain "renesas,8bit-timer"

  - reg: base address and length of the registers block for the timer module.

  - interrupts: interrupt-specifier for the timer, CMIA and TOVI

  - clocks: a list of phandle, one for each entry in clock-names.

  - clock-names: must contain "fck" for the functional clock.

Example:

	timer8_0: timer@ffff80 {

		compatible = "renesas,8bit-timer";

		reg = <0xffff80 10>;

		interrupts = <36>;

		clocks = <&fclk>;

		clock-names = "fck";

	};

../../../arch/h8300/boot/dts

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