Commit b229b6ca authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'perf-tools-fixes-for-v6.1-2022-10-26' of...

Merge tag 'perf-tools-fixes-for-v6.1-2022-10-26' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux

Pull perf tool fixes from Arnaldo Carvalho de Melo:

 - Fix some aspects of building with an older (than the one in the
   kernel sources) libbpf present in a distro, when building with
   LIBBPF_DYNAMIC=1.

 - Fix errno setting races with event_fd and the signal handler in 'perf
   record'.

 - Fix Power10 hv-24x7 metric events when some events may have a zero
   count based on system configuration.

 - Do not fail Intel-PT misc test w/o libpython, just skip it.

 - Fix incorrect arm64 Hisi hip08 L3 metrics (IF_BP_MISP_BR_RET,
   IF_BP_MISP_BR_RET, IF_BP_MISP_BR_BL) due to mistakes in the
   documentation used to generate the JSON files for these metrics.

 - Fix auxtrace (Intel PT, ARM Coresight) address filter symbol name
   match for modules, we need to skip the module name.

 - Sync copies of files with the kernel sources, including ppc syscall
   tables and assorted headers, some resulting in tools being able to
   decode new network protocols (IPPROTO_L2TP) and statx masks
   (STATX_DIOALIGN).

 - Fix PMU name pai_crypto in the vendor events file (JSON) for s390.

 - Fix man page build wrt perf-arm-coresight.txt as the build process
   assumes files starting with 'perf-' are man pages, and this file
   isn't one.

* tag 'perf-tools-fixes-for-v6.1-2022-10-26' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux:
  perf vendor events arm64: Fix incorrect Hisi hip08 L3 metrics
  perf auxtrace: Fix address filter symbol name match for modules
  tools headers UAPI: Sync linux/perf_event.h with the kernel sources
  tools headers cpufeatures: Sync with the kernel sources
  tools headers uapi: Sync linux/stat.h with the kernel sources
  tools include UAPI: Sync sound/asound.h copy with the kernel sources
  tools headers uapi: Update linux/in.h copy
  tools headers: Update the copy of x86's memcpy_64.S used in 'perf bench'
  tools headers arm64: Sync arm64's cputype.h with the kernel sources
  perf test: Do not fail Intel-PT misc test w/o libpython
  perf list: Fix PMU name pai_crypto in perf list on s390
  perf record: Fix event fd races
  perf bpf: Fix build with libbpf 0.7.0 by checking if bpf_program__set_insns() is available
  perf bpf: Fix build with libbpf 0.7.0 by adding prototype for bpf_load_program()
  perf vendor events power10: Fix hv-24x7 metric events
  perf docs: Fix man page build wrt perf-arm-coresight.txt
  tools headers UAPI: Sync powerpc syscall tables with the kernel sources
parents a2718383 e9229d5b
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+4 −0
Original line number Diff line number Diff line
@@ -60,6 +60,7 @@
#define ARM_CPU_IMP_FUJITSU		0x46
#define ARM_CPU_IMP_HISI		0x48
#define ARM_CPU_IMP_APPLE		0x61
#define ARM_CPU_IMP_AMPERE		0xC0

#define ARM_CPU_PART_AEM_V8		0xD0F
#define ARM_CPU_PART_FOUNDATION		0xD00
@@ -123,6 +124,8 @@
#define APPLE_CPU_PART_M1_ICESTORM_MAX	0x028
#define APPLE_CPU_PART_M1_FIRESTORM_MAX	0x029

#define AMPERE_CPU_PART_AMPERE1		0xAC3

#define MIDR_CORTEX_A53 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A53)
#define MIDR_CORTEX_A57 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A57)
#define MIDR_CORTEX_A72 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A72)
@@ -172,6 +175,7 @@
#define MIDR_APPLE_M1_FIRESTORM_PRO MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_FIRESTORM_PRO)
#define MIDR_APPLE_M1_ICESTORM_MAX MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_ICESTORM_MAX)
#define MIDR_APPLE_M1_FIRESTORM_MAX MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_FIRESTORM_MAX)
#define MIDR_AMPERE1 MIDR_CPU_MODEL(ARM_CPU_IMP_AMPERE, AMPERE_CPU_PART_AMPERE1)

/* Fujitsu Erratum 010001 affects A64FX 1.0 and 1.1, (v0r0 and v1r0) */
#define MIDR_FUJITSU_ERRATUM_010001		MIDR_FUJITSU_A64FX
+1 −1
Original line number Diff line number Diff line
@@ -96,7 +96,7 @@
#define X86_FEATURE_SYSCALL32		( 3*32+14) /* "" syscall in IA32 userspace */
#define X86_FEATURE_SYSENTER32		( 3*32+15) /* "" sysenter in IA32 userspace */
#define X86_FEATURE_REP_GOOD		( 3*32+16) /* REP microcode works well */
/* FREE!                                ( 3*32+17) */
#define X86_FEATURE_AMD_LBR_V2		( 3*32+17) /* AMD Last Branch Record Extension Version 2 */
#define X86_FEATURE_LFENCE_RDTSC	( 3*32+18) /* "" LFENCE synchronizes RDTSC */
#define X86_FEATURE_ACC_POWER		( 3*32+19) /* AMD Accumulated Power Mechanism */
#define X86_FEATURE_NOPL		( 3*32+20) /* The NOPL (0F 1F) instructions */
+1 −1
Original line number Diff line number Diff line
@@ -27,7 +27,7 @@
 * Output:
 * rax original destination
 */
SYM_FUNC_START(__memcpy)
SYM_TYPED_FUNC_START(__memcpy)
	ALTERNATIVE_2 "jmp memcpy_orig", "", X86_FEATURE_REP_GOOD, \
		      "jmp memcpy_erms", X86_FEATURE_ERMS

+1 −0
Original line number Diff line number Diff line
@@ -103,6 +103,7 @@ FEATURE_TESTS_EXTRA := \
         libbpf-bpf_prog_load           \
         libbpf-bpf_object__next_program \
         libbpf-bpf_object__next_map    \
         libbpf-bpf_program__set_insns  \
         libbpf-bpf_create_map		\
         libpfm4                        \
         libdebuginfod			\
+4 −0
Original line number Diff line number Diff line
@@ -63,6 +63,7 @@ FILES= \
         test-libbpf-bpf_map_create.bin		\
         test-libbpf-bpf_object__next_program.bin \
         test-libbpf-bpf_object__next_map.bin   \
         test-libbpf-bpf_program__set_insns.bin	\
         test-libbpf-btf__raw_data.bin          \
         test-get_cpuid.bin                     \
         test-sdt.bin                           \
@@ -316,6 +317,9 @@ $(OUTPUT)test-libbpf-bpf_object__next_program.bin:
$(OUTPUT)test-libbpf-bpf_object__next_map.bin:
	$(BUILD) -lbpf

$(OUTPUT)test-libbpf-bpf_program__set_insns.bin:
	$(BUILD) -lbpf

$(OUTPUT)test-libbpf-btf__raw_data.bin:
	$(BUILD) -lbpf

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