Commit b2268e26 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-next-fixes-2022-12-01' of...

Merge tag 'drm-intel-next-fixes-2022-12-01' of git://anongit.freedesktop.org/drm/drm-intel

 into drm-next

- Multi-cast register fix (Matt)
- Fix workarounds on gen2-3 (Tvrtko)
- Bigjoiner fix (Ville)
- Make Guc default_list a const data (Jani)
- Acquire forcewake before uncore read (Umesh)
- Selftest fix (Umesh)
- HuC related fixes (Daniele)
- Fix some incorrect return values (Janusz)
- Fix a memory leak in bios related code (Xia)
- Fix VBT send packet port selection (Mikko)
- DG2's DMC fix bump for Register noclaims and few restore (Gustavo)

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/Y4jZBRw9KvlKgkr6@intel.com
parents 077bd800 7d579eff
Loading
Loading
Loading
Loading
+1 −1
Original line number Diff line number Diff line
@@ -414,7 +414,7 @@ static void *generate_lfp_data_ptrs(struct drm_i915_private *i915,
		ptrs->lvds_entries++;

	if (size != 0 || ptrs->lvds_entries != 3) {
		kfree(ptrs);
		kfree(ptrs_block);
		return NULL;
	}

+7 −3
Original line number Diff line number Diff line
@@ -3733,12 +3733,16 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc,

static u8 bigjoiner_pipes(struct drm_i915_private *i915)
{
	u8 pipes;

	if (DISPLAY_VER(i915) >= 12)
		return BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D);
		pipes = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D);
	else if (DISPLAY_VER(i915) >= 11)
		return BIT(PIPE_B) | BIT(PIPE_C);
		pipes = BIT(PIPE_B) | BIT(PIPE_C);
	else
		return 0;
		pipes = 0;

	return pipes & RUNTIME_INFO(i915)->pipe_mask;
}

static bool transcoder_ddi_func_is_enabled(struct drm_i915_private *dev_priv,
+2 −2
Original line number Diff line number Diff line
@@ -52,8 +52,8 @@

#define DISPLAY_VER12_DMC_MAX_FW_SIZE	ICL_DMC_MAX_FW_SIZE

#define DG2_DMC_PATH			DMC_PATH(dg2, 2, 07)
#define DG2_DMC_VERSION_REQUIRED	DMC_VERSION(2, 07)
#define DG2_DMC_PATH			DMC_PATH(dg2, 2, 08)
#define DG2_DMC_VERSION_REQUIRED	DMC_VERSION(2, 8)
MODULE_FIRMWARE(DG2_DMC_PATH);

#define ADLP_DMC_PATH			DMC_PATH(adlp, 2, 16)
+2 −2
Original line number Diff line number Diff line
@@ -137,9 +137,9 @@ static enum port intel_dsi_seq_port_to_port(struct intel_dsi *intel_dsi,
		return ffs(intel_dsi->ports) - 1;

	if (seq_port) {
		if (intel_dsi->ports & PORT_B)
		if (intel_dsi->ports & BIT(PORT_B))
			return PORT_B;
		else if (intel_dsi->ports & PORT_C)
		else if (intel_dsi->ports & BIT(PORT_C))
			return PORT_C;
	}

+10 −5
Original line number Diff line number Diff line
@@ -677,8 +677,13 @@ int intel_gt_wait_for_idle(struct intel_gt *gt, long timeout)
			return -EINTR;
	}

	return timeout ? timeout : intel_uc_wait_for_idle(&gt->uc,
							  remaining_timeout);
	if (timeout)
		return timeout;

	if (remaining_timeout < 0)
		remaining_timeout = 0;

	return intel_uc_wait_for_idle(&gt->uc, remaining_timeout);
}

int intel_gt_init(struct intel_gt *gt)
@@ -1035,7 +1040,7 @@ get_reg_and_bit(const struct intel_engine_cs *engine, const bool gen8,
static int wait_for_invalidate(struct intel_gt *gt, struct reg_and_bit rb)
{
	if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 50))
		return intel_gt_mcr_wait_for_reg_fw(gt, rb.mcr_reg, rb.bit, 0,
		return intel_gt_mcr_wait_for_reg(gt, rb.mcr_reg, rb.bit, 0,
						 TLB_INVAL_TIMEOUT_US,
						 TLB_INVAL_TIMEOUT_MS);
	else
Loading