Commit b1ae3587 authored by Bjarni Jonasson's avatar Bjarni Jonasson Committed by Jakub Kicinski
Browse files

net: phy: Add 100 base-x mode



Sparx-5 supports this mode and it is missing in the PHY core.

Signed-off-by: default avatarBjarni Jonasson <bjarni.jonasson@microchip.com>
Reviewed-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 3c51fa5d
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+5 −0
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@@ -286,6 +286,11 @@ Some of the interface modes are described below:
    Note: due to legacy usage, some 10GBASE-R usage incorrectly makes
    use of this definition.

``PHY_INTERFACE_MODE_100BASEX``
    This defines IEEE 802.3 Clause 24.  The link operates at a fixed data
    rate of 125Mpbs using a 4B/5B encoding scheme, resulting in an underlying
    data rate of 100Mpbs.

Pause frames / flow control
===========================

+4 −0
Original line number Diff line number Diff line
@@ -104,6 +104,7 @@ extern const int phy_10gbit_features_array[1];
 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax
 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII
 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII
 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX
 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX
 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX
 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI
@@ -135,6 +136,7 @@ typedef enum {
	PHY_INTERFACE_MODE_MOCA,
	PHY_INTERFACE_MODE_QSGMII,
	PHY_INTERFACE_MODE_TRGMII,
	PHY_INTERFACE_MODE_100BASEX,
	PHY_INTERFACE_MODE_1000BASEX,
	PHY_INTERFACE_MODE_2500BASEX,
	PHY_INTERFACE_MODE_RXAUI,
@@ -217,6 +219,8 @@ static inline const char *phy_modes(phy_interface_t interface)
		return "usxgmii";
	case PHY_INTERFACE_MODE_10GKR:
		return "10gbase-kr";
	case PHY_INTERFACE_MODE_100BASEX:
		return "100base-x";
	default:
		return "unknown";
	}