Commit b179f35b authored by Luca Weiss's avatar Luca Weiss Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: sm6350: add uart1 node 



Add the node describing uart1 incl. opp table and pinctrl.

Signed-off-by: default avatarLuca Weiss <luca.weiss@fairphone.com>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230421-fp4-bluetooth-v2-3-3de840d5483e@fairphone.com
parent 4b2c7ac8

arch/arm64/boot/dts/qcom/sm6350.dtsi

+63 −0
Original line number Diff line number Diff line
@@ -464,6 +464,25 @@ 
		};

	};



	qup_opp_table: opp-table-qup {

		compatible = "operating-points-v2";



		opp-75000000 {

			opp-hz = /bits/ 64 <75000000>;

			required-opps = <&rpmhpd_opp_low_svs>;

		};



		opp-100000000 {

			opp-hz = /bits/ 64 <100000000>;

			required-opps = <&rpmhpd_opp_svs>;

		};



		opp-128000000 {

			opp-hz = /bits/ 64 <128000000>;

			required-opps = <&rpmhpd_opp_nom>;

		};

	};



	pmu {

		compatible = "arm,armv8-pmuv3";

		interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_LOW>;
@@ -882,6 +901,22 @@ 
				status = "disabled";

			};



			uart1: serial@884000 {

				compatible = "qcom,geni-uart";

				reg = <0 0x00884000 0 0x4000>;

				clock-names = "se";

				clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;

				pinctrl-names = "default";

				pinctrl-0 = <&qup_uart1_cts>, <&qup_uart1_rts>, <&qup_uart1_tx>, <&qup_uart1_rx>;

				interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;

				power-domains = <&rpmhpd SM6350_CX>;

				operating-points-v2 = <&qup_opp_table>;

				interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,

						<&aggre1_noc MASTER_QUP_0 0 &clk_virt SLAVE_EBI_CH0 0>;

				interconnect-names = "qup-core", "qup-config";

				status = "disabled";

			};



			i2c2: i2c@888000 {

				compatible = "qcom,geni-i2c";

				reg = <0 0x00888000 0 0x4000>;
@@ -1867,6 +1902,34 @@ 
				drive-strength = <2>;

				bias-pull-up;

			};



			qup_uart1_cts: qup-uart1-cts-default-state {

				pins = "gpio61";

				function = "qup01";

				drive-strength = <2>;

				bias-disable;

			};



			qup_uart1_rts: qup-uart1-rts-default-state {

				pins = "gpio62";

				function = "qup01";

				drive-strength = <2>;

				bias-pull-down;

			};



			qup_uart1_rx: qup-uart1-rx-default-state {

				pins = "gpio64";

				function = "qup01";

				drive-strength = <2>;

				bias-disable;

			};



			qup_uart1_tx: qup-uart1-tx-default-state {

				pins = "gpio63";

				function = "qup01";

				drive-strength = <2>;

				bias-pull-up;

			};

		};



		apps_smmu: iommu@15000000 {