Commit b154d8d8 authored by Fabio Estevam's avatar Fabio Estevam Committed by Shawn Guo
Browse files

ARM: imx: Remove ehci board files 



Now that the i.MX board files have been removed, there
is no need for keeping the ehci related files, so just
remove them.

Signed-off-by: default avatarFabio Estevam <festevam@gmail.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent e1324ece

arch/arm/mach-imx/Makefile

+3 −4
Original line number Diff line number Diff line
@@ -3,11 +3,10 @@ obj-y := cpu.o system.o irq-common.o 


obj-$(CONFIG_SOC_IMX25) += cpu-imx25.o mach-imx25.o pm-imx25.o



obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o mach-imx27.o

obj-$(CONFIG_SOC_IMX27) += mm-imx27.o ehci-imx27.o

obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o mach-imx27.o mm-imx27.o



obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o iomux-imx31.o ehci-imx31.o mach-imx31.o

obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o ehci-imx35.o mach-imx35.o

obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o iomux-imx31.o mach-imx31.o

obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o mach-imx35.o



imx5-pm-$(CONFIG_PM) += pm-imx5.o

obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o $(imx5-pm-y)

arch/arm/mach-imx/ehci-imx27.c

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Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-or-later

/*

 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>

 * Copyright (C) 2010 Freescale Semiconductor, Inc.

 */



#include <linux/platform_device.h>

#include <linux/io.h>

#include <linux/platform_data/usb-ehci-mxc.h>



#include "ehci.h"

#include "hardware.h"



#define USBCTRL_OTGBASE_OFFSET	0x600



#define MX27_OTG_SIC_SHIFT	29

#define MX27_OTG_SIC_MASK	(0x3 << MX27_OTG_SIC_SHIFT)

#define MX27_OTG_PM_BIT		(1 << 24)



#define MX27_H2_SIC_SHIFT	21

#define MX27_H2_SIC_MASK	(0x3 << MX27_H2_SIC_SHIFT)

#define MX27_H2_PM_BIT		(1 << 16)

#define MX27_H2_DT_BIT		(1 << 5)



#define MX27_H1_SIC_SHIFT	13

#define MX27_H1_SIC_MASK	(0x3 << MX27_H1_SIC_SHIFT)

#define MX27_H1_PM_BIT		(1 << 8)

#define MX27_H1_DT_BIT		(1 << 4)



int mx27_initialize_usb_hw(int port, unsigned int flags)

{

	unsigned int v;



	v = readl(MX27_IO_ADDRESS(MX27_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));



	switch (port) {

	case 0:	/* OTG port */

		v &= ~(MX27_OTG_SIC_MASK | MX27_OTG_PM_BIT);

		v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX27_OTG_SIC_SHIFT;



		if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))

			v |= MX27_OTG_PM_BIT;

		break;

	case 1: /* H1 port */

		v &= ~(MX27_H1_SIC_MASK | MX27_H1_PM_BIT | MX27_H1_DT_BIT);

		v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX27_H1_SIC_SHIFT;



		if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))

			v |= MX27_H1_PM_BIT;



		if (!(flags & MXC_EHCI_TTL_ENABLED))

			v |= MX27_H1_DT_BIT;



		break;

	case 2:	/* H2 port */

		v &= ~(MX27_H2_SIC_MASK | MX27_H2_PM_BIT | MX27_H2_DT_BIT);

		v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX27_H2_SIC_SHIFT;



		if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))

			v |= MX27_H2_PM_BIT;



		if (!(flags & MXC_EHCI_TTL_ENABLED))

			v |= MX27_H2_DT_BIT;



		break;

	default:

		return -EINVAL;

	}



	writel(v, MX27_IO_ADDRESS(MX27_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));



	return 0;

}

arch/arm/mach-imx/ehci-imx31.c

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Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-or-later

/*

 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>

 * Copyright (C) 2010 Freescale Semiconductor, Inc.

 */



#include <linux/platform_device.h>

#include <linux/io.h>

#include <linux/platform_data/usb-ehci-mxc.h>



#include "ehci.h"

#include "hardware.h"



#define USBCTRL_OTGBASE_OFFSET	0x600



#define MX31_OTG_SIC_SHIFT	29

#define MX31_OTG_SIC_MASK	(0x3 << MX31_OTG_SIC_SHIFT)

#define MX31_OTG_PM_BIT		(1 << 24)



#define MX31_H2_SIC_SHIFT	21

#define MX31_H2_SIC_MASK	(0x3 << MX31_H2_SIC_SHIFT)

#define MX31_H2_PM_BIT		(1 << 16)

#define MX31_H2_DT_BIT		(1 << 5)



#define MX31_H1_SIC_SHIFT	13

#define MX31_H1_SIC_MASK	(0x3 << MX31_H1_SIC_SHIFT)

#define MX31_H1_PM_BIT		(1 << 8)

#define MX31_H1_DT_BIT		(1 << 4)



int mx31_initialize_usb_hw(int port, unsigned int flags)

{

	unsigned int v;



	v = readl(MX31_IO_ADDRESS(MX31_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));



	switch (port) {

	case 0:	/* OTG port */

		v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);

		v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_OTG_SIC_SHIFT;



		if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))

			v |= MX31_OTG_PM_BIT;



		break;

	case 1: /* H1 port */

		v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT | MX31_H1_DT_BIT);

		v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_H1_SIC_SHIFT;



		if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))

			v |= MX31_H1_PM_BIT;



		if (!(flags & MXC_EHCI_TTL_ENABLED))

			v |= MX31_H1_DT_BIT;



		break;

	case 2:	/* H2 port */

		v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT | MX31_H2_DT_BIT);

		v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_H2_SIC_SHIFT;



		if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))

			v |= MX31_H2_PM_BIT;



		if (!(flags & MXC_EHCI_TTL_ENABLED))

			v |= MX31_H2_DT_BIT;



		break;

	default:

		return -EINVAL;

	}



	writel(v, MX31_IO_ADDRESS(MX31_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));



	return 0;

}

arch/arm/mach-imx/ehci-imx35.c

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Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-or-later

/*

 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>

 * Copyright (C) 2010 Freescale Semiconductor, Inc.

 */



#include <linux/platform_device.h>

#include <linux/io.h>

#include <linux/platform_data/usb-ehci-mxc.h>



#include "ehci.h"

#include "hardware.h"



#define USBCTRL_OTGBASE_OFFSET	0x600



#define MX35_OTG_SIC_SHIFT	29

#define MX35_OTG_SIC_MASK	(0x3 << MX35_OTG_SIC_SHIFT)

#define MX35_OTG_PM_BIT		(1 << 24)

#define MX35_OTG_PP_BIT		(1 << 11)

#define MX35_OTG_OCPOL_BIT	(1 << 3)



#define MX35_H1_SIC_SHIFT	21

#define MX35_H1_SIC_MASK	(0x3 << MX35_H1_SIC_SHIFT)

#define MX35_H1_PP_BIT		(1 << 18)

#define MX35_H1_PM_BIT		(1 << 16)

#define MX35_H1_IPPUE_UP_BIT	(1 << 7)

#define MX35_H1_IPPUE_DOWN_BIT	(1 << 6)

#define MX35_H1_TLL_BIT		(1 << 5)

#define MX35_H1_USBTE_BIT	(1 << 4)

#define MX35_H1_OCPOL_BIT	(1 << 2)



int mx35_initialize_usb_hw(int port, unsigned int flags)

{

	unsigned int v;



	v = readl(MX35_IO_ADDRESS(MX35_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));



	switch (port) {

	case 0:	/* OTG port */

		v &= ~(MX35_OTG_SIC_MASK | MX35_OTG_PM_BIT | MX35_OTG_PP_BIT |

			MX35_OTG_OCPOL_BIT);

		v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX35_OTG_SIC_SHIFT;



		if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))

			v |= MX35_OTG_PM_BIT;



		if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH)

			v |= MX35_OTG_PP_BIT;



		if (!(flags & MXC_EHCI_OC_PIN_ACTIVE_LOW))

			v |= MX35_OTG_OCPOL_BIT;



		break;

	case 1: /* H1 port */

		v &= ~(MX35_H1_SIC_MASK | MX35_H1_PM_BIT | MX35_H1_PP_BIT |

			MX35_H1_OCPOL_BIT | MX35_H1_TLL_BIT | MX35_H1_USBTE_BIT |

			MX35_H1_IPPUE_DOWN_BIT | MX35_H1_IPPUE_UP_BIT);

		v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX35_H1_SIC_SHIFT;



		if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))

			v |= MX35_H1_PM_BIT;



		if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH)

			v |= MX35_H1_PP_BIT;



		if (!(flags & MXC_EHCI_OC_PIN_ACTIVE_LOW))

			v |= MX35_H1_OCPOL_BIT;



		if (!(flags & MXC_EHCI_TTL_ENABLED))

			v |= MX35_H1_TLL_BIT;



		if (flags & MXC_EHCI_INTERNAL_PHY)

			v |= MX35_H1_USBTE_BIT;



		if (flags & MXC_EHCI_IPPUE_DOWN)

			v |= MX35_H1_IPPUE_DOWN_BIT;



		if (flags & MXC_EHCI_IPPUE_UP)

			v |= MX35_H1_IPPUE_UP_BIT;



		break;

	default:

		return -EINVAL;

	}



	writel(v, MX35_IO_ADDRESS(MX35_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));



	return 0;

}

arch/arm/mach-imx/ehci.h

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+0 −44
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

#ifndef __MACH_IMX_EHCI_H

#define __MACH_IMX_EHCI_H



/* values for portsc field */

#define MXC_EHCI_PHY_LOW_POWER_SUSPEND	(1 << 23)

#define MXC_EHCI_FORCE_FS		(1 << 24)

#define MXC_EHCI_UTMI_8BIT		(0 << 28)

#define MXC_EHCI_UTMI_16BIT		(1 << 28)

#define MXC_EHCI_SERIAL			(1 << 29)

#define MXC_EHCI_MODE_UTMI		(0 << 30)

#define MXC_EHCI_MODE_PHILIPS		(1 << 30)

#define MXC_EHCI_MODE_ULPI		(2 << 30)

#define MXC_EHCI_MODE_SERIAL		(3 << 30)



/* values for flags field */

#define MXC_EHCI_INTERFACE_DIFF_UNI	(0 << 0)

#define MXC_EHCI_INTERFACE_DIFF_BI	(1 << 0)

#define MXC_EHCI_INTERFACE_SINGLE_UNI	(2 << 0)

#define MXC_EHCI_INTERFACE_SINGLE_BI	(3 << 0)

#define MXC_EHCI_INTERFACE_MASK		(0xf)



#define MXC_EHCI_POWER_PINS_ENABLED	(1 << 5)

#define MXC_EHCI_PWR_PIN_ACTIVE_HIGH	(1 << 6)

#define MXC_EHCI_OC_PIN_ACTIVE_LOW	(1 << 7)

#define MXC_EHCI_TTL_ENABLED		(1 << 8)



#define MXC_EHCI_INTERNAL_PHY		(1 << 9)

#define MXC_EHCI_IPPUE_DOWN		(1 << 10)

#define MXC_EHCI_IPPUE_UP		(1 << 11)

#define MXC_EHCI_WAKEUP_ENABLED		(1 << 12)

#define MXC_EHCI_ITC_NO_THRESHOLD	(1 << 13)



#define MXC_USBCTRL_OFFSET		0

#define MXC_USB_PHY_CTR_FUNC_OFFSET	0x8

#define MXC_USB_PHY_CTR_FUNC2_OFFSET	0xc

#define MXC_USBH2CTRL_OFFSET		0x14



int mx25_initialize_usb_hw(int port, unsigned int flags);

int mx31_initialize_usb_hw(int port, unsigned int flags);

int mx35_initialize_usb_hw(int port, unsigned int flags);

int mx27_initialize_usb_hw(int port, unsigned int flags);



#endif /* __MACH_IMX_EHCI_H */