Commit b14d0db5 authored by Kan Liang's avatar Kan Liang Committed by Peter Zijlstra
Browse files

perf/x86/intel: Add Rocket Lake CPU support 



From the perspective of Intel PMU, Rocket Lake is the same as Ice Lake
and Tiger Lake. Share the perf code with them.

Signed-off-by: default avatarKan Liang <kan.liang@linux.intel.com>
Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20201019153528.13850-1-kan.liang@linux.intel.com
parent 51b646b2

arch/x86/events/intel/core.c

+1 −0
Original line number Diff line number Diff line
@@ -5436,6 +5436,7 @@ __init int intel_pmu_init(void) 
	case INTEL_FAM6_ICELAKE:

	case INTEL_FAM6_TIGERLAKE_L:

	case INTEL_FAM6_TIGERLAKE:

	case INTEL_FAM6_ROCKETLAKE:

		x86_pmu.late_ack = true;

		memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids));

		memcpy(hw_cache_extra_regs, skl_hw_cache_extra_regs, sizeof(hw_cache_extra_regs));