Commit b14b27ff authored by Jakub Kicinski's avatar Jakub Kicinski
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Merge tag 'linux-can-next-for-5.14-20210527' of...

Merge tag 'linux-can-next-for-5.14-20210527' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next

Marc Kleine-Budde says:

====================
can-next 2021-05-27

The first 2 patches are by Geert Uytterhoeven and convert the rcan_can
and rcan_canfd device tree bindings to yaml.

The next 2 patches are by Oliver Hartkopp and me and update the CAN
uapi headers.

zuoqilin's patch removes an unnecessary variable from the CAN proc
code.

Patrick Menschel contributes 3 patches for CAN ISOTP to enhance the
error messages.

Jiapeng Chong's patch removes two dead stores from the softing driver.

The next 4 patches are by me and silence several warnings found by
clang compiler.

Jimmy Assarsson's patches for the kvaser_usb driver add support for
the Kvaser hydra devices.

Dario Binacchi provides 2 patches for the c_can driver, first removing
an unused variable, then adding basic ethtool support to query driver
and ring parameter info.

The last 4 patches are by Torin Cooper-Bennun and clean up the m_can
driver.

* tag 'linux-can-next-for-5.14-20210527' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next: (21 commits)
  can: m_can: fix whitespace in a few comments
  can: m_can: make TXESC, RXESC config more explicit
  can: m_can: clean up CCCR reg defs, order by revs
  can: m_can: use bits.h macros for all regmasks
  can: c_can: add ethtool support
  can: c_can: remove unused variable struct c_can_priv::rxmasked
  can: kvaser_usb: Add new Kvaser hydra devices
  can: kvaser_usb: Rename define USB_HYBRID_{,PRO_}CANLIN_PRODUCT_ID
  can: at91_can: silence clang warning
  can: mcp251xfd: silence clang warning
  can: mcp251x: mcp251x_can_probe(): silence clang warning
  can: hi311x: hi3110_can_probe(): silence clang warning
  can: softing: Remove redundant variable ptr
  can: isotp: Add error message if txqueuelen is too small
  can: isotp: add symbolic error message to isotp_module_init()
  can: isotp: change error format from decimal to symbolic error names
  can: proc: remove unnecessary variables
  can: uapi: introduce CANFD_FDF flag for mixed content in struct canfd_frame
  can: uapi: update CAN-FD frame description
  dt-bindings: can: rcar_canfd: Convert to json-schema
  ...
====================

Link: https://lore.kernel.org/r/20210527084532.1384031-1-mkl@pengutronix.de


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents f285f37c 50fe7547
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Renesas R-Car CAN controller Device Tree Bindings
-------------------------------------------------

Required properties:
- compatible: "renesas,can-r8a7742" if CAN controller is a part of R8A7742 SoC.
	      "renesas,can-r8a7743" if CAN controller is a part of R8A7743 SoC.
	      "renesas,can-r8a7744" if CAN controller is a part of R8A7744 SoC.
	      "renesas,can-r8a7745" if CAN controller is a part of R8A7745 SoC.
	      "renesas,can-r8a77470" if CAN controller is a part of R8A77470 SoC.
	      "renesas,can-r8a774a1" if CAN controller is a part of R8A774A1 SoC.
	      "renesas,can-r8a774b1" if CAN controller is a part of R8A774B1 SoC.
	      "renesas,can-r8a774c0" if CAN controller is a part of R8A774C0 SoC.
	      "renesas,can-r8a774e1" if CAN controller is a part of R8A774E1 SoC.
	      "renesas,can-r8a7778" if CAN controller is a part of R8A7778 SoC.
	      "renesas,can-r8a7779" if CAN controller is a part of R8A7779 SoC.
	      "renesas,can-r8a7790" if CAN controller is a part of R8A7790 SoC.
	      "renesas,can-r8a7791" if CAN controller is a part of R8A7791 SoC.
	      "renesas,can-r8a7792" if CAN controller is a part of R8A7792 SoC.
	      "renesas,can-r8a7793" if CAN controller is a part of R8A7793 SoC.
	      "renesas,can-r8a7794" if CAN controller is a part of R8A7794 SoC.
	      "renesas,can-r8a7795" if CAN controller is a part of R8A7795 SoC.
	      "renesas,can-r8a7796" if CAN controller is a part of R8A77960 SoC.
	      "renesas,can-r8a77961" if CAN controller is a part of R8A77961 SoC.
	      "renesas,can-r8a77965" if CAN controller is a part of R8A77965 SoC.
	      "renesas,can-r8a77990" if CAN controller is a part of R8A77990 SoC.
	      "renesas,can-r8a77995" if CAN controller is a part of R8A77995 SoC.
	      "renesas,rcar-gen1-can" for a generic R-Car Gen1 compatible device.
	      "renesas,rcar-gen2-can" for a generic R-Car Gen2 or RZ/G1
	      compatible device.
	      "renesas,rcar-gen3-can" for a generic R-Car Gen3 or RZ/G2
	      compatible device.
	      When compatible with the generic version, nodes must list the
	      SoC-specific version corresponding to the platform first
	      followed by the generic version.

- reg: physical base address and size of the R-Car CAN register map.
- interrupts: interrupt specifier for the sole interrupt.
- clocks: phandles and clock specifiers for 3 CAN clock inputs.
- clock-names: 3 clock input name strings: "clkp1", "clkp2", and "can_clk".
- pinctrl-0: pin control group to be used for this controller.
- pinctrl-names: must be "default".

Required properties for R8A774A1, R8A774B1, R8A774C0, R8A774E1, R8A7795,
R8A77960, R8A77961, R8A77965, R8A77990, and R8A77995:
For the denoted SoCs, "clkp2" can be CANFD clock. This is a div6 clock and can
be used by both CAN and CAN FD controller at the same time. It needs to be
scaled to maximum frequency if any of these controllers use it. This is done
using the below properties:

- assigned-clocks: phandle of clkp2(CANFD) clock.
- assigned-clock-rates: maximum frequency of this clock.

Optional properties:
- renesas,can-clock-select: R-Car CAN Clock Source Select. Valid values are:
			    <0x0> (default) : Peripheral clock (clkp1)
			    <0x1> : Peripheral clock (clkp2)
			    <0x3> : External input clock

Example
-------

SoC common .dtsi file:

	can0: can@e6e80000 {
		compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can";
		reg = <0 0xe6e80000 0 0x1000>;
		interrupts = <0 186 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&mstp9_clks R8A7791_CLK_RCAN0>,
			 <&cpg_clocks R8A7791_CLK_RCAN>, <&can_clk>;
		clock-names = "clkp1", "clkp2", "can_clk";
		status = "disabled";
	};

Board specific .dts file:

&can0 {
	pinctrl-0 = <&can0_pins>;
	pinctrl-names = "default";
	status = "okay";
};
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Renesas R-Car CAN FD controller Device Tree Bindings
----------------------------------------------------

Required properties:
- compatible: Must contain one or more of the following:
  - "renesas,rcar-gen3-canfd" for R-Car Gen3 and RZ/G2 compatible controllers.
  - "renesas,r8a774a1-canfd" for R8A774A1 (RZ/G2M) compatible controller.
  - "renesas,r8a774b1-canfd" for R8A774B1 (RZ/G2N) compatible controller.
  - "renesas,r8a774c0-canfd" for R8A774C0 (RZ/G2E) compatible controller.
  - "renesas,r8a774e1-canfd" for R8A774E1 (RZ/G2H) compatible controller.
  - "renesas,r8a7795-canfd" for R8A7795 (R-Car H3) compatible controller.
  - "renesas,r8a7796-canfd" for R8A7796 (R-Car M3-W) compatible controller.
  - "renesas,r8a77965-canfd" for R8A77965 (R-Car M3-N) compatible controller.
  - "renesas,r8a77970-canfd" for R8A77970 (R-Car V3M) compatible controller.
  - "renesas,r8a77980-canfd" for R8A77980 (R-Car V3H) compatible controller.
  - "renesas,r8a77990-canfd" for R8A77990 (R-Car E3) compatible controller.
  - "renesas,r8a77995-canfd" for R8A77995 (R-Car D3) compatible controller.

  When compatible with the generic version, nodes must list the
  SoC-specific version corresponding to the platform first, followed by the
  family-specific and/or generic versions.

- reg: physical base address and size of the R-Car CAN FD register map.
- interrupts: interrupt specifiers for the Channel & Global interrupts
- clocks: phandles and clock specifiers for 3 clock inputs.
- clock-names: 3 clock input name strings: "fck", "canfd", "can_clk".
- pinctrl-0: pin control group to be used for this controller.
- pinctrl-names: must be "default".

Required child nodes:
The controller supports two channels and each is represented as a child node.
The name of the child nodes are "channel0" and "channel1" respectively. Each
child node supports the "status" property only, which is used to
enable/disable the respective channel.

Required properties for R8A774A1, R8A774B1, R8A774C0, R8A774E1, R8A7795,
R8A7796, R8A77965, R8A77990, and R8A77995:
In the denoted SoCs, canfd clock is a div6 clock and can be used by both CAN
and CAN FD controller at the same time. It needs to be scaled to maximum
frequency if any of these controllers use it. This is done using the below
properties:

- assigned-clocks: phandle of canfd clock.
- assigned-clock-rates: maximum frequency of this clock.

Optional property:
The controller can operate in either CAN FD only mode (default) or
Classical CAN only mode. The mode is global to both the channels. In order to
enable the later, define the following optional property.
 - renesas,no-can-fd: puts the controller in Classical CAN only mode.

Example
-------

SoC common .dtsi file:

		canfd: can@e66c0000 {
			compatible = "renesas,r8a7795-canfd",
				     "renesas,rcar-gen3-canfd";
			reg = <0 0xe66c0000 0 0x8000>;
			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
				   <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 914>,
			       <&cpg CPG_CORE R8A7795_CLK_CANFD>,
			       <&can_clk>;
			clock-names = "fck", "canfd", "can_clk";
			assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
			assigned-clock-rates = <40000000>;
			power-domains = <&cpg>;
			status = "disabled";

			channel0 {
				status = "disabled";
			};

			channel1 {
				status = "disabled";
			};
		};

Board specific .dts file:

E.g. below enables Channel 1 alone in the board in Classical CAN only mode.

&canfd {
	pinctrl-0 = <&canfd1_pins>;
	pinctrl-names = "default";
	renesas,no-can-fd;
	status = "okay";

	channel1 {
		status = "okay";
	};
};

E.g. below enables Channel 0 alone in the board using External clock
as fCAN clock.

&canfd {
	pinctrl-0 = <&canfd0_pins>, <&can_clk_pins>;
	pinctrl-names = "default";
	status = "okay";

	channel0 {
		status = "okay";
	};
};
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/can/renesas,rcar-can.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Renesas R-Car CAN Controller

maintainers:
  - Sergei Shtylyov <sergei.shtylyov@gmail.com>

properties:
  compatible:
    oneOf:
      - items:
          - enum:
              - renesas,can-r8a7778      # R-Car M1-A
              - renesas,can-r8a7779      # R-Car H1
          - const: renesas,rcar-gen1-can # R-Car Gen1

      - items:
          - enum:
              - renesas,can-r8a7742      # RZ/G1H
              - renesas,can-r8a7743      # RZ/G1M
              - renesas,can-r8a7744      # RZ/G1N
              - renesas,can-r8a7745      # RZ/G1E
              - renesas,can-r8a77470     # RZ/G1C
              - renesas,can-r8a7790      # R-Car H2
              - renesas,can-r8a7791      # R-Car M2-W
              - renesas,can-r8a7792      # R-Car V2H
              - renesas,can-r8a7793      # R-Car M2-N
              - renesas,can-r8a7794      # R-Car E2
          - const: renesas,rcar-gen2-can # R-Car Gen2 and RZ/G1

      - items:
          - enum:
              - renesas,can-r8a774a1     # RZ/G2M
              - renesas,can-r8a774b1     # RZ/G2N
              - renesas,can-r8a774c0     # RZ/G2E
              - renesas,can-r8a774e1     # RZ/G2H
              - renesas,can-r8a7795      # R-Car H3
              - renesas,can-r8a7796      # R-Car M3-W
              - renesas,can-r8a77961     # R-Car M3-W+
              - renesas,can-r8a77965     # R-Car M3-N
              - renesas,can-r8a77990     # R-Car E3
              - renesas,can-r8a77995     # R-Car D3
          - const: renesas,rcar-gen3-can # R-Car Gen3 and RZ/G2

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    maxItems: 3

  clock-names:
    items:
      - const: clkp1
      - const: clkp2
      - const: can_clk

  power-domains:
    maxItems: 1

  resets:
    maxItems: 1

  renesas,can-clock-select:
    $ref: /schemas/types.yaml#/definitions/uint32
    enum: [ 0, 1, 3 ]
    default: 0
    description: |
      R-Car CAN Clock Source Select.  Valid values are:
        <0x0> (default) : Peripheral clock (clkp1)
        <0x1> : Peripheral clock (clkp2)
        <0x3> : External input clock

  assigned-clocks:
    description:
      Reference to the clkp2 (CANFD) clock.
      On R-Car Gen3 and RZ/G2 SoCs, "clkp2" is the CANFD clock.  This is a div6
      clock and can be used by both CAN and CAN FD controllers at the same
      time.  It needs to be scaled to maximum frequency if any of these
      controllers use it.

  assigned-clock-rates:
    description: Maximum frequency of the CANFD clock.

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - power-domains

allOf:
  - $ref: can-controller.yaml#

  - if:
      not:
        properties:
          compatible:
            contains:
              const: renesas,rcar-gen1-can
    then:
      required:
        - resets

  - if:
      properties:
        compatible:
          contains:
            const: renesas,rcar-gen3-can
    then:
      required:
        - assigned-clocks
        - assigned-clock-rates

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/power/r8a7791-sysc.h>

    can0: can@e6e80000 {
            compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can";
            reg = <0xe6e80000 0x1000>;
            interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
            clocks = <&cpg CPG_MOD 916>,
                     <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>;
            clock-names = "clkp1", "clkp2", "can_clk";
            power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
            resets = <&cpg 916>;
    };
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/can/renesas,rcar-canfd.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Renesas R-Car CAN FD Controller

maintainers:
  - Fabrizio Castro <fabrizio.castro.jz@renesas.com>

allOf:
  - $ref: can-controller.yaml#

properties:
  compatible:
    oneOf:
      - items:
          - enum:
              - renesas,r8a774a1-canfd     # RZ/G2M
              - renesas,r8a774b1-canfd     # RZ/G2N
              - renesas,r8a774c0-canfd     # RZ/G2E
              - renesas,r8a774e1-canfd     # RZ/G2H
              - renesas,r8a7795-canfd      # R-Car H3
              - renesas,r8a7796-canfd      # R-Car M3-W
              - renesas,r8a77965-canfd     # R-Car M3-N
              - renesas,r8a77970-canfd     # R-Car V3M
              - renesas,r8a77980-canfd     # R-Car V3H
              - renesas,r8a77990-canfd     # R-Car E3
              - renesas,r8a77995-canfd     # R-Car D3
          - const: renesas,rcar-gen3-canfd # R-Car Gen3 and RZ/G2

  reg:
    maxItems: 1

  interrupts:
    items:
      - description: Channel interrupt
      - description: Global interrupt

  clocks:
    maxItems: 3

  clock-names:
    items:
      - const: fck
      - const: canfd
      - const: can_clk

  power-domains:
    maxItems: 1

  resets:
    maxItems: 1

  renesas,no-can-fd:
    $ref: /schemas/types.yaml#/definitions/flag
    description:
      The controller can operate in either CAN FD only mode (default) or
      Classical CAN only mode.  The mode is global to both the channels.
      Specify this property to put the controller in Classical CAN only mode.

  assigned-clocks:
    description:
      Reference to the CANFD clock.  The CANFD clock is a div6 clock and can be
      used by both CAN (if present) and CAN FD controllers at the same time.
      It needs to be scaled to maximum frequency if any of these controllers
      use it.

  assigned-clock-rates:
    description: Maximum frequency of the CANFD clock.

patternProperties:
  "^channel[01]$":
    type: object
    description:
      The controller supports two channels and each is represented as a child
      node.  Each child node supports the "status" property only, which
      is used to enable/disable the respective channel.

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - power-domains
  - resets
  - assigned-clocks
  - assigned-clock-rates
  - channel0
  - channel1

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/power/r8a7795-sysc.h>

    canfd: can@e66c0000 {
            compatible = "renesas,r8a7795-canfd",
                         "renesas,rcar-gen3-canfd";
            reg = <0xe66c0000 0x8000>;
            interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
            clocks = <&cpg CPG_MOD 914>,
                     <&cpg CPG_CORE R8A7795_CLK_CANFD>,
                     <&can_clk>;
            clock-names = "fck", "canfd", "can_clk";
            assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
            assigned-clock-rates = <40000000>;
            power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
            resets = <&cpg 914>;

            channel0 {
            };

            channel1 {
            };
    };
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@@ -169,7 +169,7 @@ static const struct can_bittiming_const at91_bittiming_const = {
};

#define AT91_IS(_model) \
static inline int at91_is_sam##_model(const struct at91_priv *priv) \
static inline int __maybe_unused at91_is_sam##_model(const struct at91_priv *priv) \
{ \
	return priv->devtype_data.type == AT91_DEVTYPE_SAM##_model; \
}
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