Unverified Commit b0f18f51 authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
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!15551 haoc: add support for versions lower than ARMv8.1-a 

Merge Pull Request from: @amjac 
 
1. haoc: add support for versions lower than ARMv8.1-a


issue: https://gitee.com/openeuler/kernel/issues/IBSGVE 
 
Link:https://gitee.com/openeuler/kernel/pulls/15551

 

Reviewed-by: default avatarZhang Jianhua <chris.zjh@huawei.com>
Signed-off-by: default avatarZhang Peng <zhangpeng362@huawei.com>
parents d29d6c89 7d37c70a

arch/arm64/include/asm/assembler.h

+0 −6
Original line number Diff line number Diff line
@@ -25,9 +25,6 @@ 
#include <asm/pgtable-hwdef.h>

#include <asm/ptrace.h>

#include <asm/thread_info.h>

#ifdef CONFIG_IEE

#include <asm/haoc/iee-asm.h>

#endif



	/*

	 * Provide a wxN alias for each wN register so what we can paste a xN
@@ -494,9 +491,6 @@ alternative_endif 
	.macro		load_ttbr1, pgtbl, tmp1, tmp2

	phys_to_ttbr	\tmp1, \pgtbl

	offset_ttbr1 	\tmp1, \tmp2

	#ifdef CONFIG_IEE

	orr \tmp1, \tmp1, #IEE_ASM_ASID

	#endif

	msr		ttbr1_el1, \tmp1

	isb

	.endm

arch/arm64/include/asm/haoc/iee.h

+1 −0
Original line number Diff line number Diff line
@@ -56,6 +56,7 @@ void iee_init_mappings(pgd_t *pgdp); 
void iee_init_post(void);

void iee_stack_init(void);

void iee_init_tcr(void);

void iee_setup_asid(void);



#define IEE_STACK_ORDER	0x3

#define IEE_STACK_SIZE	(PAGE_SIZE << IEE_STACK_ORDER)

arch/arm64/kernel/entry.S

+3 −0
Original line number Diff line number Diff line
@@ -28,6 +28,9 @@ 
#include <asm/thread_info.h>

#include <asm/asm-uaccess.h>

#include <asm/unistd.h>

#ifdef CONFIG_IEE

#include <asm/haoc/iee-asm.h>

#endif



#ifdef CONFIG_IEE

/* IEE code shall not be interrupted. */

arch/arm64/kernel/haoc/iee/iee-init.c

+21 −3
Original line number Diff line number Diff line
@@ -11,11 +11,12 @@ 
#include <linux/memblock.h>

#include <asm/cpufeature.h>

#include <asm/haoc/iee-mmu.h>

#include <asm/haoc/iee-asm.h>



__aligned(PAGE_SIZE) DEFINE_PER_CPU(u64*[(PAGE_SIZE/8)],

				iee_cpu_stack_ptr);



bool __initdata iee_init_done;

bool __ro_after_init iee_init_done;

bool __ro_after_init haoc_enabled;



/* Allocate pages from IEE data pool to use as per-cpu IEE stack. */
@@ -34,13 +35,30 @@ static void __init iee_stack_alloc(void) 
	flush_tlb_all();

}



/* Setup TCR for this cpu and move ASID from ttbr1 to ttbr0 */

void iee_setup_asid(void)

{

	unsigned long asid, ttbr0, ttbr1;



	ttbr1 = read_sysreg(ttbr1_el1);

	asid = FIELD_GET(TTBR_ASID_MASK, ttbr1);

	ttbr0 = read_sysreg(ttbr0_el1) | FIELD_PREP(TTBR_ASID_MASK, asid);

	ttbr1 |= FIELD_PREP(TTBR_ASID_MASK, IEE_ASID);

	write_sysreg(ttbr1, ttbr1_el1);

	write_sysreg(ttbr0, ttbr0_el1);

	write_sysreg(read_sysreg(tcr_el1) & ~TCR_A1, tcr_el1);

	isb();



	/* Flush tlb to enable IEE. */

	local_flush_tlb_all();

}



void __init iee_init_post(void)

{

	if (!haoc_enabled)

		return;



	/* Flush tlb to enable IEE. */

	flush_tlb_all();

	iee_setup_asid();



	iee_init_done = true;

}

arch/arm64/kernel/haoc/iee/iee-mmu.c

+5 −2
Original line number Diff line number Diff line
@@ -493,8 +493,11 @@ void __init iee_init_mappings(pgd_t *pgdp) 


	/* Check if hardware supports IEE. */

	if (!cpuid_feature_extract_unsigned_field(read_cpuid(ID_AA64MMFR1_EL1),

						ID_AA64MMFR1_EL1_HPDS_SHIFT))

		panic("Architecture doesn't support HPDS, please disable CONFIG_IEE.\n");

						ID_AA64MMFR1_EL1_HPDS_SHIFT)) {

		pr_err("Architecture doesn't support HPDS, please disable CONFIG_IEE.\n");

		haoc_enabled = false;

		return;

	}

	else

		pr_info("HAOC: ARM64 hardware support detected.");