Commit b0a2db9b authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu: add pre_asic_init callback for SOC15 



We need to restore some registers prior to running asic
init to work around a firmware bug.

Acked-by: default avatarNirmoy Das <nirmoy.das@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent cff6c7f9

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

+17 −18
Original line number Diff line number Diff line
@@ -1075,6 +1075,20 @@ static int gmc_v9_0_gart_init(struct amdgpu_device *adev) 
	return amdgpu_gart_table_vram_alloc(adev);

}



/**

 * gmc_v9_0_save_registers - saves regs

 *

 * @adev: amdgpu_device pointer

 *

 * This saves potential register values that should be

 * restored upon resume

 */

static void gmc_v9_0_save_registers(struct amdgpu_device *adev)

{

	if (adev->asic_type == CHIP_RAVEN)

		adev->gmc.sdpif_register = RREG32_SOC15(DCE, 0, mmDCHUBBUB_SDPIF_MMIO_CNTRL_0);

}



static int gmc_v9_0_sw_init(void *handle)

{

	int r, vram_width = 0, vram_type = 0, vram_vendor = 0;
@@ -1229,6 +1243,8 @@ static int gmc_v9_0_sw_init(void *handle) 


	amdgpu_vm_manager_init(adev);



	gmc_v9_0_save_registers(adev);



	return 0;

}
@@ -1282,7 +1298,7 @@ static void gmc_v9_0_init_golden_registers(struct amdgpu_device *adev) 
 *

 * This restores register values, saved at suspend.

 */

static void gmc_v9_0_restore_registers(struct amdgpu_device *adev)

void gmc_v9_0_restore_registers(struct amdgpu_device *adev)

{

	if (adev->asic_type == CHIP_RAVEN)

		WREG32_SOC15(DCE, 0, mmDCHUBBUB_SDPIF_MMIO_CNTRL_0, adev->gmc.sdpif_register);
@@ -1386,20 +1402,6 @@ static int gmc_v9_0_hw_init(void *handle) 
	return r;

}



/**

 * gmc_v9_0_save_registers - saves regs

 *

 * @adev: amdgpu_device pointer

 *

 * This saves potential register values that should be

 * restored upon resume

 */

static void gmc_v9_0_save_registers(struct amdgpu_device *adev)

{

	if (adev->asic_type == CHIP_RAVEN)

		adev->gmc.sdpif_register = RREG32_SOC15(DCE, 0, mmDCHUBBUB_SDPIF_MMIO_CNTRL_0);

}



/**

 * gmc_v9_0_gart_disable - gart disable

 *
@@ -1440,8 +1442,6 @@ static int gmc_v9_0_suspend(void *handle) 
	if (r)

		return r;



	gmc_v9_0_save_registers(adev);



	return 0;

}
@@ -1450,7 +1450,6 @@ static int gmc_v9_0_resume(void *handle) 
	int r;

	struct amdgpu_device *adev = (struct amdgpu_device *)handle;



	gmc_v9_0_restore_registers(adev);

	r = gmc_v9_0_hw_init(adev);

	if (r)

		return r;

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h

+2 −0
Original line number Diff line number Diff line
@@ -26,4 +26,6 @@ 


extern const struct amd_ip_funcs gmc_v9_0_ip_funcs;

extern const struct amdgpu_ip_block_version gmc_v9_0_ip_block;



void gmc_v9_0_restore_registers(struct amdgpu_device *adev);

#endif

drivers/gpu/drm/amd/amdgpu/soc15.c

+7 −0
Original line number Diff line number Diff line
@@ -1029,6 +1029,11 @@ static uint64_t soc15_get_pcie_replay_count(struct amdgpu_device *adev) 
	return (nak_r + nak_g);

}



static void soc15_pre_asic_init(struct amdgpu_device *adev)

{

	gmc_v9_0_restore_registers(adev);

}



static const struct amdgpu_asic_funcs soc15_asic_funcs =

{

	.read_disabled_bios = &soc15_read_disabled_bios,
@@ -1049,6 +1054,7 @@ static const struct amdgpu_asic_funcs soc15_asic_funcs = 
	.need_reset_on_init = &soc15_need_reset_on_init,

	.get_pcie_replay_count = &soc15_get_pcie_replay_count,

	.supports_baco = &soc15_supports_baco,

	.pre_asic_init = &soc15_pre_asic_init,

};



static const struct amdgpu_asic_funcs vega20_asic_funcs =
@@ -1072,6 +1078,7 @@ static const struct amdgpu_asic_funcs vega20_asic_funcs = 
	.need_reset_on_init = &soc15_need_reset_on_init,

	.get_pcie_replay_count = &soc15_get_pcie_replay_count,

	.supports_baco = &soc15_supports_baco,

	.pre_asic_init = &soc15_pre_asic_init,

};



static int soc15_common_early_init(void *handle)