Commit b031f104 authored by Sean Christopherson's avatar Sean Christopherson Committed by Paolo Bonzini
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KVM: x86: Use "raw" APIC register read for handling APIC-write VM-Exit 



Use the "raw" helper to read the vAPIC register after an APIC-write trap
VM-Exit.  Hardware is responsible for vetting the write, and the caller
is responsible for sanitizing the offset.  This is a functional change,
as it means KVM will consume whatever happens to be in the vAPIC page if
the write was dropped by hardware.  But, unless userspace deliberately
wrote garbage into the vAPIC page via KVM_SET_LAPIC, the value should be
zero since it's not writable by the guest.

This aligns common x86 with SVM's AVIC logic, i.e. paves the way for
using the nodecode path to handle APIC-write traps when AVIC is enabled.

Signed-off-by: default avatarSean Christopherson <seanjc@google.com>
Message-Id: <20220204214205.3306634-4-seanjc@google.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent b5ede3df

arch/x86/kvm/lapic.c

+1 −3
Original line number Diff line number Diff line
@@ -2178,9 +2178,7 @@ EXPORT_SYMBOL_GPL(kvm_lapic_set_eoi); 
/* emulate APIC access in a trap manner */

void kvm_apic_write_nodecode(struct kvm_vcpu *vcpu, u32 offset)

{

	u32 val = 0;



	kvm_lapic_reg_read(vcpu->arch.apic, offset, 4, &val);

	u32 val = kvm_lapic_get_reg(vcpu->arch.apic, offset);



	/* TODO: optimize to just emulate side effect w/o one more write */

	kvm_lapic_reg_write(vcpu->arch.apic, offset, val);