Commit b02180e8 authored by Claudiu Beznea's avatar Claudiu Beznea Committed by Daniel Lezcano
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clocksource/drivers/timer-microchip-pit64b: Use mchp_pit64b_{suspend, resume}



Use mchp_pit64b_suspend() and mchp_pit64b_resume() to disable or
enable timers clocks on init and remove specific
clk_prepare_{disable, enable} calls. This is ok also for clockevent timer
as proper clock enable, disable is done on .set_state_oneshot,
.set_state_periodic, .set_state_shutdown calls.

Signed-off-by: default avatarClaudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220609094041.1796372-3-claudiu.beznea@microchip.com


Signed-off-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
parent 2c9c4c9e
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+5 −19
Original line number Original line Diff line number Diff line
@@ -344,6 +344,7 @@ static int __init mchp_pit64b_init_clksrc(struct mchp_pit64b_timer *timer,
	if (!cs)
	if (!cs)
		return -ENOMEM;
		return -ENOMEM;


	mchp_pit64b_resume(timer);
	mchp_pit64b_reset(timer, ULLONG_MAX, MCHP_PIT64B_MR_CONT, 0);
	mchp_pit64b_reset(timer, ULLONG_MAX, MCHP_PIT64B_MR_CONT, 0);


	mchp_pit64b_cs_base = timer->base;
	mchp_pit64b_cs_base = timer->base;
@@ -365,8 +366,7 @@ static int __init mchp_pit64b_init_clksrc(struct mchp_pit64b_timer *timer,
		pr_debug("clksrc: Failed to register PIT64B clocksource!\n");
		pr_debug("clksrc: Failed to register PIT64B clocksource!\n");


		/* Stop timer. */
		/* Stop timer. */
		writel_relaxed(MCHP_PIT64B_CR_SWRST,
		mchp_pit64b_suspend(timer);
			       timer->base + MCHP_PIT64B_CR);
		kfree(cs);
		kfree(cs);


		return ret;
		return ret;
@@ -450,19 +450,10 @@ static int __init mchp_pit64b_dt_init_timer(struct device_node *node,
	if (ret)
	if (ret)
		goto irq_unmap;
		goto irq_unmap;


	ret = clk_prepare_enable(timer.pclk);
	if (timer.mode & MCHP_PIT64B_MR_SGCLK)
	if (ret)
		goto irq_unmap;

	if (timer.mode & MCHP_PIT64B_MR_SGCLK) {
		ret = clk_prepare_enable(timer.gclk);
		if (ret)
			goto pclk_unprepare;

		clk_rate = clk_get_rate(timer.gclk);
		clk_rate = clk_get_rate(timer.gclk);
	} else {
	else
		clk_rate = clk_get_rate(timer.pclk);
		clk_rate = clk_get_rate(timer.pclk);
	}
	clk_rate = clk_rate / (MCHP_PIT64B_MODE_TO_PRES(timer.mode) + 1);
	clk_rate = clk_rate / (MCHP_PIT64B_MODE_TO_PRES(timer.mode) + 1);


	if (clkevt)
	if (clkevt)
@@ -471,15 +462,10 @@ static int __init mchp_pit64b_dt_init_timer(struct device_node *node,
		ret = mchp_pit64b_init_clksrc(&timer, clk_rate);
		ret = mchp_pit64b_init_clksrc(&timer, clk_rate);


	if (ret)
	if (ret)
		goto gclk_unprepare;
		goto irq_unmap;


	return 0;
	return 0;


gclk_unprepare:
	if (timer.mode & MCHP_PIT64B_MR_SGCLK)
		clk_disable_unprepare(timer.gclk);
pclk_unprepare:
	clk_disable_unprepare(timer.pclk);
irq_unmap:
irq_unmap:
	irq_dispose_mapping(irq);
	irq_dispose_mapping(irq);
io_unmap:
io_unmap: