Commit afe2f64a authored by Luo Jiaxing's avatar Luo Jiaxing Committed by Zheng Zengkai
Browse files

gpio: gpio-hisi: Add HiSilicon GPIO support

mainline inclusion
from mainline-v5.11-rc1
commit 356b01a9
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I4HX08
CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=356b01a986a5550ee16dd0b85306c6741f2d02d5



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This GPIO driver is for HiSilicon's ARM SoC.

HiSilicon's GPIO controller support double-edge interrupt and multi-core
concurrent access.

ACPI table example for this GPIO controller:
Device (GPO0)
{
	Name (_HID, "HISI0184")
	Device (PRTA)
	{
		Name (_ADR, Zero)
		Name (_UID, Zero)
		Name (_DSD, Package (0x01)
		{
			Package (0x02)
			{
				"ngpios",
				0x20
			}
		})
	}
}

Signed-off-by: default avatarLuo Jiaxing <luojiaxing@huawei.com>
Link: https://lore.kernel.org/r/1607934255-52544-2-git-send-email-luojiaxing@huawei.com


Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarYihang Li <liyihang6@hisilicon.com>
Reviewed-by: default avatarQi Liu <liuqi115@huawei.com>
Signed-off-by: default avatarZheng Zengkai <zhengzengkai@huawei.com>
parent 75f1142f
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