Commit afc189df authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Tvrtko Ursulin
Browse files

drm/i915: Correctly populate use_sagv_wm for all pipes 



When changing between SAGV vs. no SAGV on tgl+ we have to
update the use_sagv_wm flag for all the crtcs or else
an active pipe not already in the state will end up using
the wrong watermarks. That is especially bad when we end up
with the tighter non-SAGV watermarks with SAGV enabled.
Usually ends up in underruns.

Cc: stable@vger.kernel.org
Reviewed-by: default avatarStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Fixes: 7241c57d ("drm/i915: Add TGL+ SAGV support")
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220218064039.12834-2-ville.syrjala@linux.intel.com


(cherry picked from commit 8dd8ffb8)
Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
parent a40ee54e

drivers/gpu/drm/i915/intel_pm.c

+11 −11
Original line number Diff line number Diff line
@@ -4029,6 +4029,17 @@ static int intel_compute_sagv_mask(struct intel_atomic_state *state) 
			return ret;

	}



	if (intel_can_enable_sagv(dev_priv, new_bw_state) !=

	    intel_can_enable_sagv(dev_priv, old_bw_state)) {

		ret = intel_atomic_serialize_global_state(&new_bw_state->base);

		if (ret)

			return ret;

	} else if (new_bw_state->pipe_sagv_reject != old_bw_state->pipe_sagv_reject) {

		ret = intel_atomic_lock_global_state(&new_bw_state->base);

		if (ret)

			return ret;

	}



	for_each_new_intel_crtc_in_state(state, crtc,

					 new_crtc_state, i) {

		struct skl_pipe_wm *pipe_wm = &new_crtc_state->wm.skl.optimal;
@@ -4044,17 +4055,6 @@ static int intel_compute_sagv_mask(struct intel_atomic_state *state) 
			intel_can_enable_sagv(dev_priv, new_bw_state);

	}



	if (intel_can_enable_sagv(dev_priv, new_bw_state) !=

	    intel_can_enable_sagv(dev_priv, old_bw_state)) {

		ret = intel_atomic_serialize_global_state(&new_bw_state->base);

		if (ret)

			return ret;

	} else if (new_bw_state->pipe_sagv_reject != old_bw_state->pipe_sagv_reject) {

		ret = intel_atomic_lock_global_state(&new_bw_state->base);

		if (ret)

			return ret;

	}



	return 0;

}