Commit afba3e10 authored by Nir Dotan's avatar Nir Dotan Committed by David S. Miller
Browse files

mlxsw: reg: Add fields to RITR - Router Interface Table Register 



Add fields relevant for Spectrum-2 Loopback IPinIP router interface
creation. Add additional Loopback RIF protocol value - Generic, used for
creation of an explicit underlay RIF, and also add a field named
underlay_rif used for specifying the underlay RIF of a tunnel.

Signed-off-by: default avatarNir Dotan <nird@mellanox.com>
Reviewed-by: default avatarPetr Machata <petrm@mellanox.com>
Signed-off-by: default avatarIdo Schimmel <idosch@mellanox.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 4e15cbe8

drivers/net/ethernet/mellanox/mlxsw/reg.h

+13 −3
Original line number Diff line number Diff line
@@ -5666,6 +5666,8 @@ enum mlxsw_reg_ritr_loopback_protocol { 
	MLXSW_REG_RITR_LOOPBACK_PROTOCOL_IPIP_IPV4,

	/* IPinIP IPv6 underlay Unicast */

	MLXSW_REG_RITR_LOOPBACK_PROTOCOL_IPIP_IPV6,

	/* IPinIP generic - used for Spectrum-2 underlay RIF */

	MLXSW_REG_RITR_LOOPBACK_GENERIC,

};



/* reg_ritr_loopback_protocol
@@ -5706,6 +5708,13 @@ MLXSW_ITEM32(reg, ritr, loopback_ipip_options, 0x10, 20, 4); 
 */

MLXSW_ITEM32(reg, ritr, loopback_ipip_uvr, 0x10, 0, 16);



/* reg_ritr_loopback_ipip_underlay_rif

 * Underlay ingress router interface.

 * Reserved for Spectrum.

 * Access: RW

 */

MLXSW_ITEM32(reg, ritr, loopback_ipip_underlay_rif, 0x14, 0, 16);



/* reg_ritr_loopback_ipip_usip*

 * Encapsulation Underlay source IP.

 * Access: RW
@@ -5821,11 +5830,12 @@ static inline void 
mlxsw_reg_ritr_loopback_ipip_common_pack(char *payload,

			    enum mlxsw_reg_ritr_loopback_ipip_type ipip_type,

			    enum mlxsw_reg_ritr_loopback_ipip_options options,

			    u16 uvr_id, u32 gre_key)

			    u16 uvr_id, u16 underlay_rif, u32 gre_key)

{

	mlxsw_reg_ritr_loopback_ipip_type_set(payload, ipip_type);

	mlxsw_reg_ritr_loopback_ipip_options_set(payload, options);

	mlxsw_reg_ritr_loopback_ipip_uvr_set(payload, uvr_id);

	mlxsw_reg_ritr_loopback_ipip_underlay_rif_set(payload, underlay_rif);

	mlxsw_reg_ritr_loopback_ipip_gre_key_set(payload, gre_key);

}
@@ -5833,12 +5843,12 @@ static inline void 
mlxsw_reg_ritr_loopback_ipip4_pack(char *payload,

			    enum mlxsw_reg_ritr_loopback_ipip_type ipip_type,

			    enum mlxsw_reg_ritr_loopback_ipip_options options,

			    u16 uvr_id, u32 usip, u32 gre_key)

			    u16 uvr_id, u16 underlay_rif, u32 usip, u32 gre_key)

{

	mlxsw_reg_ritr_loopback_protocol_set(payload,

				    MLXSW_REG_RITR_LOOPBACK_PROTOCOL_IPIP_IPV4);

	mlxsw_reg_ritr_loopback_ipip_common_pack(payload, ipip_type, options,

						 uvr_id, gre_key);

						 uvr_id, underlay_rif, gre_key);

	mlxsw_reg_ritr_loopback_ipip_usip4_set(payload, usip);

}

drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c

+1 −1
Original line number Diff line number Diff line
@@ -1453,7 +1453,7 @@ mlxsw_sp_rif_ipip_lb_op(struct mlxsw_sp_rif_ipip_lb *lb_rif, 
				    rif->rif_index, rif->vr_id, rif->dev->mtu);

		mlxsw_reg_ritr_loopback_ipip4_pack(ritr_pl, lb_cf.lb_ipipt,

			    MLXSW_REG_RITR_LOOPBACK_IPIP_OPTIONS_GRE_KEY_PRESET,

			    ul_vr->id, saddr4, lb_cf.okey);

			    ul_vr->id, 0, saddr4, lb_cf.okey);

		break;



	case MLXSW_SP_L3_PROTO_IPV6: