Loading drivers/gpu/drm/nouveau/include/nvif/class.h +3 −0 Original line number Diff line number Diff line Loading @@ -166,6 +166,8 @@ #define VOLTA_A /* cl9097.h */ 0x0000c397 #define TURING_A /* cl9097.h */ 0x0000c597 #define NV74_BSP 0x000074b0 #define GT212_MSVLD 0x000085b1 Loading Loading @@ -207,6 +209,7 @@ #define PASCAL_COMPUTE_A 0x0000c0c0 #define PASCAL_COMPUTE_B 0x0000c1c0 #define VOLTA_COMPUTE_A 0x0000c3c0 #define TURING_COMPUTE_A 0x0000c5c0 #define NV74_CIPHER 0x000074c1 #endif drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h +1 −0 Original line number Diff line number Diff line Loading @@ -53,4 +53,5 @@ int gp107_gr_new(struct nvkm_device *, int, struct nvkm_gr **); int gp108_gr_new(struct nvkm_device *, int, struct nvkm_gr **); int gp10b_gr_new(struct nvkm_device *, int, struct nvkm_gr **); int gv100_gr_new(struct nvkm_device *, int, struct nvkm_gr **); int tu102_gr_new(struct nvkm_device *, int, struct nvkm_gr **); #endif drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +3 −0 Original line number Diff line number Diff line Loading @@ -2491,6 +2491,7 @@ nv162_chipset = { .disp = tu102_disp_new, .dma = gv100_dma_new, .fifo = tu102_fifo_new, .gr = tu102_gr_new, .nvdec[0] = gm107_nvdec_new, .nvenc[0] = gm107_nvenc_new, .sec2 = tu102_sec2_new, Loading Loading @@ -2528,6 +2529,7 @@ nv164_chipset = { .disp = tu102_disp_new, .dma = gv100_dma_new, .fifo = tu102_fifo_new, .gr = tu102_gr_new, .nvdec[0] = gm107_nvdec_new, .nvdec[1] = gm107_nvdec_new, .nvenc[0] = gm107_nvenc_new, Loading Loading @@ -2566,6 +2568,7 @@ nv166_chipset = { .disp = tu102_disp_new, .dma = gv100_dma_new, .fifo = tu102_fifo_new, .gr = tu102_gr_new, .nvdec[0] = gm107_nvdec_new, .nvdec[1] = gm107_nvdec_new, .nvdec[2] = gm107_nvdec_new, Loading drivers/gpu/drm/nouveau/nvkm/engine/gr/Kbuild +2 −0 Original line number Diff line number Diff line Loading @@ -39,6 +39,7 @@ nvkm-y += nvkm/engine/gr/gp107.o nvkm-y += nvkm/engine/gr/gp108.o nvkm-y += nvkm/engine/gr/gp10b.o nvkm-y += nvkm/engine/gr/gv100.o nvkm-y += nvkm/engine/gr/tu102.o nvkm-y += nvkm/engine/gr/ctxnv40.o nvkm-y += nvkm/engine/gr/ctxnv50.o Loading @@ -61,3 +62,4 @@ nvkm-y += nvkm/engine/gr/ctxgp102.o nvkm-y += nvkm/engine/gr/ctxgp104.o nvkm-y += nvkm/engine/gr/ctxgp107.o nvkm-y += nvkm/engine/gr/ctxgv100.o nvkm-y += nvkm/engine/gr/ctxtu102.o drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c +4 −1 Original line number Diff line number Diff line Loading @@ -1334,6 +1334,7 @@ gf100_grctx_generate_floorsweep(struct gf100_gr *gr) } gf100_gr_init_num_tpc_per_gpc(gr, false, true); if (!func->skip_pd_num_tpc_per_gpc) gf100_gr_init_num_tpc_per_gpc(gr, true, false); if (func->r4060a8) Loading Loading @@ -1425,6 +1426,8 @@ gf100_grctx_generate_main(struct gf100_gr *gr, struct gf100_grctx *info) grctx->r419a3c(gr); if (grctx->r408840) grctx->r408840(gr); if (grctx->r419c0c) grctx->r419c0c(gr); } #define CB_RESERVED 0x80000 Loading Loading
drivers/gpu/drm/nouveau/include/nvif/class.h +3 −0 Original line number Diff line number Diff line Loading @@ -166,6 +166,8 @@ #define VOLTA_A /* cl9097.h */ 0x0000c397 #define TURING_A /* cl9097.h */ 0x0000c597 #define NV74_BSP 0x000074b0 #define GT212_MSVLD 0x000085b1 Loading Loading @@ -207,6 +209,7 @@ #define PASCAL_COMPUTE_A 0x0000c0c0 #define PASCAL_COMPUTE_B 0x0000c1c0 #define VOLTA_COMPUTE_A 0x0000c3c0 #define TURING_COMPUTE_A 0x0000c5c0 #define NV74_CIPHER 0x000074c1 #endif
drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h +1 −0 Original line number Diff line number Diff line Loading @@ -53,4 +53,5 @@ int gp107_gr_new(struct nvkm_device *, int, struct nvkm_gr **); int gp108_gr_new(struct nvkm_device *, int, struct nvkm_gr **); int gp10b_gr_new(struct nvkm_device *, int, struct nvkm_gr **); int gv100_gr_new(struct nvkm_device *, int, struct nvkm_gr **); int tu102_gr_new(struct nvkm_device *, int, struct nvkm_gr **); #endif
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +3 −0 Original line number Diff line number Diff line Loading @@ -2491,6 +2491,7 @@ nv162_chipset = { .disp = tu102_disp_new, .dma = gv100_dma_new, .fifo = tu102_fifo_new, .gr = tu102_gr_new, .nvdec[0] = gm107_nvdec_new, .nvenc[0] = gm107_nvenc_new, .sec2 = tu102_sec2_new, Loading Loading @@ -2528,6 +2529,7 @@ nv164_chipset = { .disp = tu102_disp_new, .dma = gv100_dma_new, .fifo = tu102_fifo_new, .gr = tu102_gr_new, .nvdec[0] = gm107_nvdec_new, .nvdec[1] = gm107_nvdec_new, .nvenc[0] = gm107_nvenc_new, Loading Loading @@ -2566,6 +2568,7 @@ nv166_chipset = { .disp = tu102_disp_new, .dma = gv100_dma_new, .fifo = tu102_fifo_new, .gr = tu102_gr_new, .nvdec[0] = gm107_nvdec_new, .nvdec[1] = gm107_nvdec_new, .nvdec[2] = gm107_nvdec_new, Loading
drivers/gpu/drm/nouveau/nvkm/engine/gr/Kbuild +2 −0 Original line number Diff line number Diff line Loading @@ -39,6 +39,7 @@ nvkm-y += nvkm/engine/gr/gp107.o nvkm-y += nvkm/engine/gr/gp108.o nvkm-y += nvkm/engine/gr/gp10b.o nvkm-y += nvkm/engine/gr/gv100.o nvkm-y += nvkm/engine/gr/tu102.o nvkm-y += nvkm/engine/gr/ctxnv40.o nvkm-y += nvkm/engine/gr/ctxnv50.o Loading @@ -61,3 +62,4 @@ nvkm-y += nvkm/engine/gr/ctxgp102.o nvkm-y += nvkm/engine/gr/ctxgp104.o nvkm-y += nvkm/engine/gr/ctxgp107.o nvkm-y += nvkm/engine/gr/ctxgv100.o nvkm-y += nvkm/engine/gr/ctxtu102.o
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c +4 −1 Original line number Diff line number Diff line Loading @@ -1334,6 +1334,7 @@ gf100_grctx_generate_floorsweep(struct gf100_gr *gr) } gf100_gr_init_num_tpc_per_gpc(gr, false, true); if (!func->skip_pd_num_tpc_per_gpc) gf100_gr_init_num_tpc_per_gpc(gr, true, false); if (func->r4060a8) Loading Loading @@ -1425,6 +1426,8 @@ gf100_grctx_generate_main(struct gf100_gr *gr, struct gf100_grctx *info) grctx->r419a3c(gr); if (grctx->r408840) grctx->r408840(gr); if (grctx->r419c0c) grctx->r419c0c(gr); } #define CB_RESERVED 0x80000 Loading