Commit af4e20d3 authored Sep 30, 2022 by Tejas Upadhyay Committed by Tvrtko Ursulin Oct 03, 2022

drm/i915/ehl: Update MOCS table for EHL



Add these extra EHL entries back since we have
drm-tip commit 13d29c82
("drm/i915/ehl: unconditionally flush the pages on acquire")
introduces proper flushing to make it work as expected.

Cc: Chris Wilson <chris.p.wilson@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Fixes: 04609175 ("Revert "drm/i915/ehl: Update MOCS table for EHL"")
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
Acked-by: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220930133223.2757282-1-tejas.upadhyay@intel.com


(cherry picked from commit 6fa964c0)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

parent 54b978e0

drivers/gpu/drm/i915/gt/intel_mocs.c

+8 −0

Original line number	Diff line number	Diff line
		@@ -207,6 +207,14 @@ static const struct drm_i915_mocs_entry broxton_mocs_table[] = {
		MOCS_ENTRY(15, \
		LE_3_WB \| LE_TC_1_LLC \| LE_LRUM(2) \| LE_AOM(1), \
		L3_3_WB), \
		/* Bypass LLC - Uncached (EHL+) */ \
		MOCS_ENTRY(16, \
		LE_1_UC \| LE_TC_1_LLC \| LE_SCF(1), \
		L3_1_UC), \
		/* Bypass LLC - L3 (Read-Only) (EHL+) */ \
		MOCS_ENTRY(17, \
		LE_1_UC \| LE_TC_1_LLC \| LE_SCF(1), \
		L3_3_WB), \
		/* Self-Snoop - L3 + LLC */ \
		MOCS_ENTRY(18, \
		LE_3_WB \| LE_TC_1_LLC \| LE_LRUM(3) \| LE_SSE(3), \