Commit af2aedc5 authored by Guangbin Huang's avatar Guangbin Huang Committed by David S. Miller
Browse files

net: hns3: add support to query device specifications 



To improve code maintainability and compatibility, new commands
HCLGE_OPC_QUERY_DEV_SPECS for PF and HCLGEVF_OPC_QUERY_DEV_SPECS
for VF are introduced to query device specifications, instead of
statically defining specifications by checking the hardware version
or other methods.

Signed-off-by: default avatarGuangbin Huang <huangguangbin2@huawei.com>
Signed-off-by: default avatarHuazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 9484e337

drivers/net/ethernet/hisilicon/hns3/hnae3.h

+11 −0
Original line number Diff line number Diff line
@@ -267,6 +267,16 @@ struct hnae3_ring_chain_node { 
#define HNAE3_IS_TX_RING(node) \

	(((node)->flag & (1 << HNAE3_RING_TYPE_B)) == HNAE3_RING_TYPE_TX)



/* device specification info from firmware */

struct hnae3_dev_specs {

	u32 mac_entry_num; /* number of mac-vlan table entry */

	u32 mng_entry_num; /* number of manager table entry */

	u16 rss_ind_tbl_size;

	u16 rss_key_size;

	u16 int_ql_max; /* max value of interrupt coalesce based on INT_QL */

	u8 max_non_tso_bd_num; /* max BD number of one non-TSO packet */

};



struct hnae3_client_ops {

	int (*init_instance)(struct hnae3_handle *handle);

	void (*uninit_instance)(struct hnae3_handle *handle, bool reset);
@@ -294,6 +304,7 @@ struct hnae3_ae_dev { 
	struct list_head node;

	u32 flag;

	unsigned long hw_err_reset_req;

	struct hnae3_dev_specs dev_specs;

	u32 dev_version;

	unsigned long caps[BITS_TO_LONGS(HNAE3_DEV_CAPS_MAX_NUM)];

	void *priv;

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h

+15 −1
Original line number Diff line number Diff line
@@ -115,7 +115,8 @@ enum hclge_opcode_type { 
	HCLGE_OPC_DFX_RCB_REG		= 0x004D,

	HCLGE_OPC_DFX_TQP_REG		= 0x004E,

	HCLGE_OPC_DFX_SSU_REG_2		= 0x004F,

	HCLGE_OPC_DFX_QUERY_CHIP_CAP	= 0x0050,



	HCLGE_OPC_QUERY_DEV_SPECS	= 0x0050,



	/* MAC command */

	HCLGE_OPC_CONFIG_MAC_MODE	= 0x0301,
@@ -1088,6 +1089,19 @@ struct hclge_sfp_info_bd0_cmd { 
	u8 data[HCLGE_SFP_INFO_BD0_LEN];

};



#define HCLGE_QUERY_DEV_SPECS_BD_NUM		4



struct hclge_dev_specs_0_cmd {

	__le32 rsv0;

	__le32 mac_entry_num;

	__le32 mng_entry_num;

	__le16 rss_ind_tbl_size;

	__le16 rss_key_size;

	__le16 int_ql_max;

	u8 max_non_tso_bd_num;

	u8 rsv1[5];

};



int hclge_cmd_init(struct hclge_dev *hdev);

static inline void hclge_write_reg(void __iomem *base, u32 reg, u32 value)

{

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c

+62 −0
Original line number Diff line number Diff line
@@ -1356,6 +1356,61 @@ static int hclge_get_cfg(struct hclge_dev *hdev, struct hclge_cfg *hcfg) 
	return 0;

}



static void hclge_set_default_dev_specs(struct hclge_dev *hdev)

{

#define HCLGE_MAX_NON_TSO_BD_NUM			8U



	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev);



	ae_dev->dev_specs.max_non_tso_bd_num = HCLGE_MAX_NON_TSO_BD_NUM;

	ae_dev->dev_specs.rss_ind_tbl_size = HCLGE_RSS_IND_TBL_SIZE;

	ae_dev->dev_specs.rss_key_size = HCLGE_RSS_KEY_SIZE;

}



static void hclge_parse_dev_specs(struct hclge_dev *hdev,

				  struct hclge_desc *desc)

{

	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev);

	struct hclge_dev_specs_0_cmd *req0;



	req0 = (struct hclge_dev_specs_0_cmd *)desc[0].data;



	ae_dev->dev_specs.max_non_tso_bd_num = req0->max_non_tso_bd_num;

	ae_dev->dev_specs.rss_ind_tbl_size =

		le16_to_cpu(req0->rss_ind_tbl_size);

	ae_dev->dev_specs.rss_key_size = le16_to_cpu(req0->rss_key_size);

}



static int hclge_query_dev_specs(struct hclge_dev *hdev)

{

	struct hclge_desc desc[HCLGE_QUERY_DEV_SPECS_BD_NUM];

	int ret;

	int i;



	/* set default specifications as devices lower than version V3 do not

	 * support querying specifications from firmware.

	 */

	if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V3) {

		hclge_set_default_dev_specs(hdev);

		return 0;

	}



	for (i = 0; i < HCLGE_QUERY_DEV_SPECS_BD_NUM - 1; i++) {

		hclge_cmd_setup_basic_desc(&desc[i], HCLGE_OPC_QUERY_DEV_SPECS,

					   true);

		desc[i].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT);

	}

	hclge_cmd_setup_basic_desc(&desc[i], HCLGE_OPC_QUERY_DEV_SPECS, true);



	ret = hclge_cmd_send(&hdev->hw, desc, HCLGE_QUERY_DEV_SPECS_BD_NUM);

	if (ret)

		return ret;



	hclge_parse_dev_specs(hdev, desc);



	return 0;

}



static int hclge_get_cap(struct hclge_dev *hdev)

{

	int ret;
@@ -9990,6 +10045,13 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev) 
	if (ret)

		goto err_cmd_uninit;



	ret = hclge_query_dev_specs(hdev);

	if (ret) {

		dev_err(&pdev->dev, "failed to query dev specifications, ret = %d.\n",

			ret);

		goto err_cmd_uninit;

	}



	ret = hclge_configure(hdev);

	if (ret) {

		dev_err(&pdev->dev, "Configure dev error, ret = %d.\n", ret);

drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_cmd.h

+15 −0
Original line number Diff line number Diff line
@@ -91,6 +91,8 @@ enum hclgevf_opcode_type { 
	/* Generic command */

	HCLGEVF_OPC_QUERY_FW_VER	= 0x0001,

	HCLGEVF_OPC_QUERY_VF_RSRC	= 0x0024,

	HCLGEVF_OPC_QUERY_DEV_SPECS	= 0x0050,



	/* TQP command */

	HCLGEVF_OPC_QUERY_TX_STATUS	= 0x0B03,

	HCLGEVF_OPC_QUERY_RX_STATUS	= 0x0B13,
@@ -270,6 +272,19 @@ struct hclgevf_cfg_tx_queue_pointer_cmd { 
#define HCLGEVF_NIC_CMQ_DESC_NUM_S	3

#define HCLGEVF_NIC_CMDQ_INT_SRC_REG	0x27100



#define HCLGEVF_QUERY_DEV_SPECS_BD_NUM		4



struct hclgevf_dev_specs_0_cmd {

	__le32 rsv0;

	__le32 mac_entry_num;

	__le32 mng_entry_num;

	__le16 rss_ind_tbl_size;

	__le16 rss_key_size;

	__le16 int_ql_max;

	u8 max_non_tso_bd_num;

	u8 rsv1[5];

};



static inline void hclgevf_write_reg(void __iomem *base, u32 reg, u32 value)

{

	writel(value, base + reg);

drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c

+64 −0
Original line number Diff line number Diff line
@@ -2939,6 +2939,63 @@ static int hclgevf_query_vf_resource(struct hclgevf_dev *hdev) 
	return 0;

}



static void hclgevf_set_default_dev_specs(struct hclgevf_dev *hdev)

{

#define HCLGEVF_MAX_NON_TSO_BD_NUM			8U



	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev);



	ae_dev->dev_specs.max_non_tso_bd_num =

					HCLGEVF_MAX_NON_TSO_BD_NUM;

	ae_dev->dev_specs.rss_ind_tbl_size = HCLGEVF_RSS_IND_TBL_SIZE;

	ae_dev->dev_specs.rss_key_size = HCLGEVF_RSS_KEY_SIZE;

}



static void hclgevf_parse_dev_specs(struct hclgevf_dev *hdev,

				    struct hclgevf_desc *desc)

{

	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev);

	struct hclgevf_dev_specs_0_cmd *req0;



	req0 = (struct hclgevf_dev_specs_0_cmd *)desc[0].data;



	ae_dev->dev_specs.max_non_tso_bd_num = req0->max_non_tso_bd_num;

	ae_dev->dev_specs.rss_ind_tbl_size =

					le16_to_cpu(req0->rss_ind_tbl_size);

	ae_dev->dev_specs.rss_key_size = le16_to_cpu(req0->rss_key_size);

}



static int hclgevf_query_dev_specs(struct hclgevf_dev *hdev)

{

	struct hclgevf_desc desc[HCLGEVF_QUERY_DEV_SPECS_BD_NUM];

	int ret;

	int i;



	/* set default specifications as devices lower than version V3 do not

	 * support querying specifications from firmware.

	 */

	if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V3) {

		hclgevf_set_default_dev_specs(hdev);

		return 0;

	}



	for (i = 0; i < HCLGEVF_QUERY_DEV_SPECS_BD_NUM - 1; i++) {

		hclgevf_cmd_setup_basic_desc(&desc[i],

					     HCLGEVF_OPC_QUERY_DEV_SPECS, true);

		desc[i].flag |= cpu_to_le16(HCLGEVF_CMD_FLAG_NEXT);

	}

	hclgevf_cmd_setup_basic_desc(&desc[i], HCLGEVF_OPC_QUERY_DEV_SPECS,

				     true);



	ret = hclgevf_cmd_send(&hdev->hw, desc, HCLGEVF_QUERY_DEV_SPECS_BD_NUM);

	if (ret)

		return ret;



	hclgevf_parse_dev_specs(hdev, desc);



	return 0;

}



static int hclgevf_pci_reset(struct hclgevf_dev *hdev)

{

	struct pci_dev *pdev = hdev->pdev;
@@ -3047,6 +3104,13 @@ static int hclgevf_init_hdev(struct hclgevf_dev *hdev) 
	if (ret)

		goto err_cmd_init;



	ret = hclgevf_query_dev_specs(hdev);

	if (ret) {

		dev_err(&pdev->dev,

			"failed to query dev specifications, ret = %d\n", ret);

		goto err_cmd_init;

	}



	ret = hclgevf_init_msi(hdev);

	if (ret) {

		dev_err(&pdev->dev, "failed(%d) to init MSI/MSI-X\n", ret);