Commit af16bdea authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'perf-urgent-2021-11-21' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 perf fixes from Thomas Gleixner:

 - Remove unneded PEBS disabling when taking LBR snapshots to prevent an
   unchecked MSR access error.

 - Fix IIO event constraints for Snowridge and Skylake server chips.

* tag 'perf-urgent-2021-11-21' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/perf: Fix snapshot_branch_stack warning in VM
  perf/x86/intel/uncore: Fix IIO event constraints for Snowridge
  perf/x86/intel/uncore: Fix IIO event constraints for Skylake Server
  perf/x86/intel/uncore: Fix filter_tid mask for CHA events on Skylake Server
parents 75603b14 f3fd84a3

arch/x86/events/intel/core.c

+0 −2
Original line number Diff line number Diff line
@@ -2211,7 +2211,6 @@ intel_pmu_snapshot_branch_stack(struct perf_branch_entry *entries, unsigned int 
	/* must not have branches... */

	local_irq_save(flags);

	__intel_pmu_disable_all(false); /* we don't care about BTS */

	__intel_pmu_pebs_disable_all();

	__intel_pmu_lbr_disable();

	/*            ... until here */

	return __intel_pmu_snapshot_branch_stack(entries, cnt, flags);
@@ -2225,7 +2224,6 @@ intel_pmu_snapshot_arch_branch_stack(struct perf_branch_entry *entries, unsigned 
	/* must not have branches... */

	local_irq_save(flags);

	__intel_pmu_disable_all(false); /* we don't care about BTS */

	__intel_pmu_pebs_disable_all();

	__intel_pmu_arch_lbr_disable();

	/*            ... until here */

	return __intel_pmu_snapshot_branch_stack(entries, cnt, flags);

arch/x86/events/intel/uncore_snbep.c

+12 −0
Original line number Diff line number Diff line
@@ -3608,6 +3608,9 @@ static int skx_cha_hw_config(struct intel_uncore_box *box, struct perf_event *ev 
	struct hw_perf_event_extra *reg1 = &event->hw.extra_reg;

	struct extra_reg *er;

	int idx = 0;

	/* Any of the CHA events may be filtered by Thread/Core-ID.*/

	if (event->hw.config & SNBEP_CBO_PMON_CTL_TID_EN)

		idx = SKX_CHA_MSR_PMON_BOX_FILTER_TID;



	for (er = skx_uncore_cha_extra_regs; er->msr; er++) {

		if (er->event != (event->hw.config & er->config_mask))
@@ -3675,6 +3678,7 @@ static struct event_constraint skx_uncore_iio_constraints[] = { 
	UNCORE_EVENT_CONSTRAINT(0xc0, 0xc),

	UNCORE_EVENT_CONSTRAINT(0xc5, 0xc),

	UNCORE_EVENT_CONSTRAINT(0xd4, 0xc),

	UNCORE_EVENT_CONSTRAINT(0xd5, 0xc),

	EVENT_CONSTRAINT_END

};
@@ -4525,6 +4529,13 @@ static void snr_iio_cleanup_mapping(struct intel_uncore_type *type) 
	pmu_iio_cleanup_mapping(type, &snr_iio_mapping_group);

}



static struct event_constraint snr_uncore_iio_constraints[] = {

	UNCORE_EVENT_CONSTRAINT(0x83, 0x3),

	UNCORE_EVENT_CONSTRAINT(0xc0, 0xc),

	UNCORE_EVENT_CONSTRAINT(0xd5, 0xc),

	EVENT_CONSTRAINT_END

};



static struct intel_uncore_type snr_uncore_iio = {

	.name			= "iio",

	.num_counters		= 4,
@@ -4536,6 +4547,7 @@ static struct intel_uncore_type snr_uncore_iio = { 
	.event_mask_ext		= SNR_IIO_PMON_RAW_EVENT_MASK_EXT,

	.box_ctl		= SNR_IIO_MSR_PMON_BOX_CTL,

	.msr_offset		= SNR_IIO_MSR_OFFSET,

	.constraints		= snr_uncore_iio_constraints,

	.ops			= &ivbep_uncore_msr_ops,

	.format_group		= &snr_uncore_iio_format_group,

	.attr_update		= snr_iio_attr_update,