Commit af10ec31 authored by Tejas Upadhyay's avatar Tejas Upadhyay Committed by Lucas De Marchi
Browse files

drm/i915/adl_p: Add ddc pin mapping 



From VBT, ddc pin info suggests the following mapping:
    VBT                                    DRIVER
    DDI TC1->ddc_pin=3 should translate to PORT_TC1->0x9
    DDI TC2->ddc_pin=4 should translate to PORT_TC2->0xa
    DDI TC3->ddc_pin=5 should translate to PORT_TC3->0xb
    DDI TC4->ddc_pin=6 should translate to PORT_TC4->0xc

Adding pin map to facilitate this translation as we cannot use existing
icl ddc pin map due to conflict with DDI C and DDI TC1 info.

Bspec:20124

v2:
  - Changed Author to Tejas Upadhyay

Cc: Clinton Taylor <Clinton.A.Taylor@intel.com>
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Acked-by: default avatarImre Deak <imre.deak@intel.com>
Signed-off-by: default avatarLee Shawn C <shawn.c.lee@intel.com>
Signed-off-by: default avatarTejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Signed-off-by: default avatarRaviteja Goud Talla <ravitejax.goud.talla@intel.com>
Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211203073720.3823371-1-ravitejax.goud.talla@intel.com
parent b1e47472

drivers/gpu/drm/i915/display/intel_bios.c

+13 −1
Original line number Diff line number Diff line
@@ -1555,12 +1555,24 @@ static const u8 gen9bc_tgp_ddc_pin_map[] = { 
	[DDC_BUS_DDI_D] = GMBUS_PIN_10_TC2_ICP,

};



static const u8 adlp_ddc_pin_map[] = {

	[ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,

	[ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,

	[ADLP_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP,

	[ADLP_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP,

	[ADLP_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP,

	[ADLP_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP,

};



static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)

{

	const u8 *ddc_pin_map;

	int n_entries;



	if (IS_ALDERLAKE_S(i915)) {

	if (IS_ALDERLAKE_P(i915)) {

		ddc_pin_map = adlp_ddc_pin_map;

		n_entries = ARRAY_SIZE(adlp_ddc_pin_map);

	} else if (IS_ALDERLAKE_S(i915)) {

		ddc_pin_map = adls_ddc_pin_map;

		n_entries = ARRAY_SIZE(adls_ddc_pin_map);

	} else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {

drivers/gpu/drm/i915/display/intel_vbt_defs.h

+6 −1
Original line number Diff line number Diff line
@@ -330,7 +330,12 @@ enum vbt_gmbus_ddi { 
	ADLS_DDC_BUS_PORT_TC1 = 0x2,

	ADLS_DDC_BUS_PORT_TC2,

	ADLS_DDC_BUS_PORT_TC3,

	ADLS_DDC_BUS_PORT_TC4

	ADLS_DDC_BUS_PORT_TC4,

	ADLP_DDC_BUS_PORT_TC1 = 0x3,

	ADLP_DDC_BUS_PORT_TC2,

	ADLP_DDC_BUS_PORT_TC3,

	ADLP_DDC_BUS_PORT_TC4



};



#define DP_AUX_A 0x40