Commit aeecc50a authored by Dmitry Osipenko's avatar Dmitry Osipenko Committed by Thierry Reding
Browse files

soc/tegra: fuse: Reset hardware 



The FUSE controller is enabled at a boot time. Reset it in order to put
hardware and clock into clean and disabled state.

Reviewed-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 765d95f8

drivers/soc/tegra/fuse/fuse-tegra.c

+25 −0
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ 
#include <linux/of_address.h>

#include <linux/platform_device.h>

#include <linux/pm_runtime.h>

#include <linux/reset.h>

#include <linux/slab.h>

#include <linux/sys_soc.h>
@@ -243,6 +244,30 @@ static int tegra_fuse_probe(struct platform_device *pdev) 
		goto restore;

	}



	fuse->rst = devm_reset_control_get_optional(&pdev->dev, "fuse");

	if (IS_ERR(fuse->rst)) {

		err = PTR_ERR(fuse->rst);

		dev_err(&pdev->dev, "failed to get FUSE reset: %pe\n",

			fuse->rst);

		goto restore;

	}



	/*

	 * FUSE clock is enabled at a boot time, hence this resume/suspend

	 * disables the clock besides the h/w resetting.

	 */

	err = pm_runtime_resume_and_get(&pdev->dev);

	if (err)

		goto restore;



	err = reset_control_reset(fuse->rst);

	pm_runtime_put(&pdev->dev);



	if (err < 0) {

		dev_err(&pdev->dev, "failed to reset FUSE: %d\n", err);

		goto restore;

	}



	/* release the early I/O memory mapping */

	iounmap(base);

drivers/soc/tegra/fuse/fuse.h

+1 −0
Original line number Diff line number Diff line
@@ -43,6 +43,7 @@ struct tegra_fuse { 
	void __iomem *base;

	phys_addr_t phys;

	struct clk *clk;

	struct reset_control *rst;



	u32 (*read_early)(struct tegra_fuse *fuse, unsigned int offset);

	u32 (*read)(struct tegra_fuse *fuse, unsigned int offset);