Commit ae2ac2d8 authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915/wm: remove ILK+ nop funcs fallback 



Disabling ILK+ watermarks on failure to read the watermark levels dates
back to 2010 and commit 7f8a8569 ("drm/i915: Add the support of
memory self-refresh on Ironlake"), with no explanations, and it's been
copied and modified from that ever since. Finally drop it.

If the value are actually zero, the ilk_compute_*_wm() functions should
handle it gracefully.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Suggested-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230215141910.433043-5-jani.nikula@intel.com
parent 4923e99f

drivers/gpu/drm/i915/display/i9xx_wm.c

+1 −13
Original line number Diff line number Diff line
@@ -4007,19 +4007,7 @@ void i9xx_wm_init(struct drm_i915_private *dev_priv) 
	/* For FIFO watermark updates */

	if (HAS_PCH_SPLIT(dev_priv)) {

		ilk_setup_wm_latency(dev_priv);



		if ((DISPLAY_VER(dev_priv) == 5 && dev_priv->display.wm.pri_latency[1] &&

		     dev_priv->display.wm.spr_latency[1] && dev_priv->display.wm.cur_latency[1]) ||

		    (DISPLAY_VER(dev_priv) != 5 && dev_priv->display.wm.pri_latency[0] &&

		     dev_priv->display.wm.spr_latency[0] && dev_priv->display.wm.cur_latency[0])) {

		dev_priv->display.funcs.wm = &ilk_wm_funcs;

		} else {

			ilk_init_lp_watermarks(dev_priv);

			drm_dbg_kms(&dev_priv->drm,

				    "Failed to read display plane latency. "

				    "Disable CxSR\n");

			dev_priv->display.funcs.wm = &nop_funcs;

		}

	} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {

		vlv_setup_wm_latency(dev_priv);

		dev_priv->display.funcs.wm = &vlv_wm_funcs;