Commit ae271547 authored by Andrew Lunn's avatar Andrew Lunn Committed by Jakub Kicinski
Browse files

net: dsa: sja1105: C45 only transactions for PCS 



The sja1105 MDIO bus driver only supports C45 transfers. Update the
function names to make this clear, pass the mmd as a parameter, and
register the accessors to the _c45 ops of the bus driver structure.

Signed-off-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarMichael Walle <michael@walle.cc>
Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 47e61593

drivers/net/dsa/sja1105/sja1105.h

+10 −6
Original line number Diff line number Diff line
@@ -149,8 +149,10 @@ struct sja1105_info { 
	bool (*rxtstamp)(struct dsa_switch *ds, int port, struct sk_buff *skb);

	void (*txtstamp)(struct dsa_switch *ds, int port, struct sk_buff *skb);

	int (*clocking_setup)(struct sja1105_private *priv);

	int (*pcs_mdio_read)(struct mii_bus *bus, int phy, int reg);

	int (*pcs_mdio_write)(struct mii_bus *bus, int phy, int reg, u16 val);

	int (*pcs_mdio_read_c45)(struct mii_bus *bus, int phy, int mmd,

				 int reg);

	int (*pcs_mdio_write_c45)(struct mii_bus *bus, int phy, int mmd,

				  int reg, u16 val);

	int (*disable_microcontroller)(struct sja1105_private *priv);

	const char *name;

	bool supports_mii[SJA1105_MAX_NUM_PORTS];
@@ -303,10 +305,12 @@ void sja1105_frame_memory_partitioning(struct sja1105_private *priv); 
/* From sja1105_mdio.c */

int sja1105_mdiobus_register(struct dsa_switch *ds);

void sja1105_mdiobus_unregister(struct dsa_switch *ds);

int sja1105_pcs_mdio_read(struct mii_bus *bus, int phy, int reg);

int sja1105_pcs_mdio_write(struct mii_bus *bus, int phy, int reg, u16 val);

int sja1110_pcs_mdio_read(struct mii_bus *bus, int phy, int reg);

int sja1110_pcs_mdio_write(struct mii_bus *bus, int phy, int reg, u16 val);

int sja1105_pcs_mdio_read_c45(struct mii_bus *bus, int phy, int mmd, int reg);

int sja1105_pcs_mdio_write_c45(struct mii_bus *bus, int phy, int mmd, int reg,

			       u16 val);

int sja1110_pcs_mdio_read_c45(struct mii_bus *bus, int phy, int mmd, int reg);

int sja1110_pcs_mdio_write_c45(struct mii_bus *bus, int phy, int mmd, int reg,

			       u16 val);



/* From sja1105_devlink.c */

int sja1105_devlink_setup(struct dsa_switch *ds);

drivers/net/dsa/sja1105/sja1105_mdio.c

+13 −31
Original line number Diff line number Diff line
@@ -7,20 +7,15 @@ 


#define SJA1110_PCS_BANK_REG		SJA1110_SPI_ADDR(0x3fc)



int sja1105_pcs_mdio_read(struct mii_bus *bus, int phy, int reg)

int sja1105_pcs_mdio_read_c45(struct mii_bus *bus, int phy, int mmd, int reg)

{

	struct sja1105_mdio_private *mdio_priv = bus->priv;

	struct sja1105_private *priv = mdio_priv->priv;

	u64 addr;

	u32 tmp;

	u16 mmd;

	int rc;



	if (!(reg & MII_ADDR_C45))

		return -EINVAL;



	mmd = (reg >> MII_DEVADDR_C45_SHIFT) & 0x1f;

	addr = (mmd << 16) | (reg & GENMASK(15, 0));

	addr = (mmd << 16) | reg;



	if (mmd != MDIO_MMD_VEND1 && mmd != MDIO_MMD_VEND2)

		return 0xffff;
@@ -37,19 +32,15 @@ int sja1105_pcs_mdio_read(struct mii_bus *bus, int phy, int reg) 
	return tmp & 0xffff;

}



int sja1105_pcs_mdio_write(struct mii_bus *bus, int phy, int reg, u16 val)

int sja1105_pcs_mdio_write_c45(struct mii_bus *bus, int phy, int mmd,

			       int reg, u16 val)

{

	struct sja1105_mdio_private *mdio_priv = bus->priv;

	struct sja1105_private *priv = mdio_priv->priv;

	u64 addr;

	u32 tmp;

	u16 mmd;



	if (!(reg & MII_ADDR_C45))

		return -EINVAL;



	mmd = (reg >> MII_DEVADDR_C45_SHIFT) & 0x1f;

	addr = (mmd << 16) | (reg & GENMASK(15, 0));

	addr = (mmd << 16) | reg;

	tmp = val;



	if (mmd != MDIO_MMD_VEND1 && mmd != MDIO_MMD_VEND2)
@@ -58,7 +49,7 @@ int sja1105_pcs_mdio_write(struct mii_bus *bus, int phy, int reg, u16 val) 
	return sja1105_xfer_u32(priv, SPI_WRITE, addr, &tmp, NULL);

}



int sja1110_pcs_mdio_read(struct mii_bus *bus, int phy, int reg)

int sja1110_pcs_mdio_read_c45(struct mii_bus *bus, int phy, int mmd, int reg)

{

	struct sja1105_mdio_private *mdio_priv = bus->priv;

	struct sja1105_private *priv = mdio_priv->priv;
@@ -66,17 +57,12 @@ int sja1110_pcs_mdio_read(struct mii_bus *bus, int phy, int reg) 
	int offset, bank;

	u64 addr;

	u32 tmp;

	u16 mmd;

	int rc;



	if (!(reg & MII_ADDR_C45))

		return -EINVAL;



	if (regs->pcs_base[phy] == SJA1105_RSV_ADDR)

		return -ENODEV;



	mmd = (reg >> MII_DEVADDR_C45_SHIFT) & 0x1f;

	addr = (mmd << 16) | (reg & GENMASK(15, 0));

	addr = (mmd << 16) | reg;



	if (mmd == MDIO_MMD_VEND2 && (reg & GENMASK(15, 0)) == MII_PHYSID1)

		return NXP_SJA1110_XPCS_ID >> 16;
@@ -108,7 +94,8 @@ int sja1110_pcs_mdio_read(struct mii_bus *bus, int phy, int reg) 
	return tmp & 0xffff;

}



int sja1110_pcs_mdio_write(struct mii_bus *bus, int phy, int reg, u16 val)

int sja1110_pcs_mdio_write_c45(struct mii_bus *bus, int phy, int reg, int mmd,

			       u16 val)

{

	struct sja1105_mdio_private *mdio_priv = bus->priv;

	struct sja1105_private *priv = mdio_priv->priv;
@@ -116,17 +103,12 @@ int sja1110_pcs_mdio_write(struct mii_bus *bus, int phy, int reg, u16 val) 
	int offset, bank;

	u64 addr;

	u32 tmp;

	u16 mmd;

	int rc;



	if (!(reg & MII_ADDR_C45))

		return -EINVAL;



	if (regs->pcs_base[phy] == SJA1105_RSV_ADDR)

		return -ENODEV;



	mmd = (reg >> MII_DEVADDR_C45_SHIFT) & 0x1f;

	addr = (mmd << 16) | (reg & GENMASK(15, 0));

	addr = (mmd << 16) | reg;



	bank = addr >> 8;

	offset = addr & GENMASK(7, 0);
@@ -398,7 +380,7 @@ static int sja1105_mdiobus_pcs_register(struct sja1105_private *priv) 
	int rc = 0;

	int port;



	if (!priv->info->pcs_mdio_read || !priv->info->pcs_mdio_write)

	if (!priv->info->pcs_mdio_read_c45 || !priv->info->pcs_mdio_write_c45)

		return 0;



	bus = mdiobus_alloc_size(sizeof(*mdio_priv));
@@ -408,8 +390,8 @@ static int sja1105_mdiobus_pcs_register(struct sja1105_private *priv) 
	bus->name = "SJA1105 PCS MDIO bus";

	snprintf(bus->id, MII_BUS_ID_SIZE, "%s-pcs",

		 dev_name(ds->dev));

	bus->read = priv->info->pcs_mdio_read;

	bus->write = priv->info->pcs_mdio_write;

	bus->read_c45 = priv->info->pcs_mdio_read_c45;

	bus->write_c45 = priv->info->pcs_mdio_write_c45;

	bus->parent = ds->dev;

	/* There is no PHY on this MDIO bus => mask out all PHY addresses

	 * from auto probing.

drivers/net/dsa/sja1105/sja1105_spi.c

+12 −12
Original line number Diff line number Diff line
@@ -719,8 +719,8 @@ const struct sja1105_info sja1105r_info = { 
	.ptp_cmd_packing	= sja1105pqrs_ptp_cmd_packing,

	.rxtstamp		= sja1105_rxtstamp,

	.clocking_setup		= sja1105_clocking_setup,

	.pcs_mdio_read		= sja1105_pcs_mdio_read,

	.pcs_mdio_write		= sja1105_pcs_mdio_write,

	.pcs_mdio_read_c45	= sja1105_pcs_mdio_read_c45,

	.pcs_mdio_write_c45	= sja1105_pcs_mdio_write_c45,

	.regs			= &sja1105pqrs_regs,

	.port_speed		= {

		[SJA1105_SPEED_AUTO] = 0,
@@ -756,8 +756,8 @@ const struct sja1105_info sja1105s_info = { 
	.ptp_cmd_packing	= sja1105pqrs_ptp_cmd_packing,

	.rxtstamp		= sja1105_rxtstamp,

	.clocking_setup		= sja1105_clocking_setup,

	.pcs_mdio_read		= sja1105_pcs_mdio_read,

	.pcs_mdio_write		= sja1105_pcs_mdio_write,

	.pcs_mdio_read_c45	= sja1105_pcs_mdio_read_c45,

	.pcs_mdio_write_c45	= sja1105_pcs_mdio_write_c45,

	.port_speed		= {

		[SJA1105_SPEED_AUTO] = 0,

		[SJA1105_SPEED_10MBPS] = 3,
@@ -794,8 +794,8 @@ const struct sja1105_info sja1110a_info = { 
	.rxtstamp		= sja1110_rxtstamp,

	.txtstamp		= sja1110_txtstamp,

	.disable_microcontroller = sja1110_disable_microcontroller,

	.pcs_mdio_read		= sja1110_pcs_mdio_read,

	.pcs_mdio_write		= sja1110_pcs_mdio_write,

	.pcs_mdio_read_c45	= sja1110_pcs_mdio_read_c45,

	.pcs_mdio_write_c45	= sja1110_pcs_mdio_write_c45,

	.port_speed		= {

		[SJA1105_SPEED_AUTO] = 0,

		[SJA1105_SPEED_10MBPS] = 4,
@@ -844,8 +844,8 @@ const struct sja1105_info sja1110b_info = { 
	.rxtstamp		= sja1110_rxtstamp,

	.txtstamp		= sja1110_txtstamp,

	.disable_microcontroller = sja1110_disable_microcontroller,

	.pcs_mdio_read		= sja1110_pcs_mdio_read,

	.pcs_mdio_write		= sja1110_pcs_mdio_write,

	.pcs_mdio_read_c45	= sja1110_pcs_mdio_read_c45,

	.pcs_mdio_write_c45	= sja1110_pcs_mdio_write_c45,

	.port_speed		= {

		[SJA1105_SPEED_AUTO] = 0,

		[SJA1105_SPEED_10MBPS] = 4,
@@ -894,8 +894,8 @@ const struct sja1105_info sja1110c_info = { 
	.rxtstamp		= sja1110_rxtstamp,

	.txtstamp		= sja1110_txtstamp,

	.disable_microcontroller = sja1110_disable_microcontroller,

	.pcs_mdio_read		= sja1110_pcs_mdio_read,

	.pcs_mdio_write		= sja1110_pcs_mdio_write,

	.pcs_mdio_read_c45	= sja1110_pcs_mdio_read_c45,

	.pcs_mdio_write_c45	= sja1110_pcs_mdio_write_c45,

	.port_speed		= {

		[SJA1105_SPEED_AUTO] = 0,

		[SJA1105_SPEED_10MBPS] = 4,
@@ -944,8 +944,8 @@ const struct sja1105_info sja1110d_info = { 
	.rxtstamp		= sja1110_rxtstamp,

	.txtstamp		= sja1110_txtstamp,

	.disable_microcontroller = sja1110_disable_microcontroller,

	.pcs_mdio_read		= sja1110_pcs_mdio_read,

	.pcs_mdio_write		= sja1110_pcs_mdio_write,

	.pcs_mdio_read_c45	= sja1110_pcs_mdio_read_c45,

	.pcs_mdio_write_c45	= sja1110_pcs_mdio_write_c45,

	.port_speed		= {

		[SJA1105_SPEED_AUTO] = 0,

		[SJA1105_SPEED_10MBPS] = 4,