Commit ad8ebf12 authored by Jonathan Cavitt's avatar Jonathan Cavitt Committed by Andi Shyti
Browse files

drm/i915/gt: Ensure memory quiesced before invalidation 



All memory traffic must be quiesced before requesting
an aux invalidation on platforms that use Aux CCS.

Fixes: 972282c4 ("drm/i915/gen12: Add aux table invalidate for all engines")
Requires: a2a4aa0eef3b ("drm/i915: Add the gen12_needs_ccs_aux_inv helper")
Signed-off-by: default avatarJonathan Cavitt <jonathan.cavitt@intel.com>
Signed-off-by: default avatarAndi Shyti <andi.shyti@linux.intel.com>
Cc: <stable@vger.kernel.org> # v5.8+
Reviewed-by: default avatarNirmoy Das <nirmoy.das@intel.com>
Reviewed-by: default avatarAndrzej Hajda <andrzej.hajda@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230725001950.1014671-4-andi.shyti@linux.intel.com
parent c827655b

drivers/gpu/drm/i915/gt/gen8_engine_cs.c

+5 −1
Original line number Diff line number Diff line
@@ -214,7 +214,11 @@ int gen12_emit_flush_rcs(struct i915_request *rq, u32 mode) 
{

	struct intel_engine_cs *engine = rq->engine;



	if (mode & EMIT_FLUSH) {

	/*

	 * On Aux CCS platforms the invalidation of the Aux

	 * table requires quiescing memory traffic beforehand

	 */

	if (mode & EMIT_FLUSH || gen12_needs_ccs_aux_inv(engine)) {

		u32 flags = 0;

		int err;

		u32 *cs;