Commit ad66dd34 authored by Suresh Siddha's avatar Suresh Siddha Committed by Ingo Molnar
Browse files

x2apic: xen64 paravirt basic apic ops 



Define the Xen specific basic apic ops, in additon to paravirt apic ops,
with some misc warning fixes.

Signed-off-by: default avatarSuresh Siddha <suresh.b.siddha@intel.com>
Cc: Jeremy Fitzhardinge <jeremy@goop.org>
Cc: akpm@linux-foundation.org
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 277d1f58

arch/x86/lguest/boot.c

+2 −2
Original line number Diff line number Diff line
@@ -783,11 +783,11 @@ static void lguest_wbinvd(void) 
 * code qualifies for Advanced.  It will also never interrupt anything.  It

 * does, however, allow us to get through the Linux boot code. */

#ifdef CONFIG_X86_LOCAL_APIC

static void lguest_apic_write(unsigned long reg, u32 v)

static void lguest_apic_write(u32 reg, u32 v)

{

}



static u32 lguest_apic_read(unsigned long reg)

static u32 lguest_apic_read(u32 reg)

{

	return 0;

}

arch/x86/xen/enlighten.c

+39 −2
Original line number Diff line number Diff line
@@ -548,16 +548,45 @@ static void xen_io_delay(void) 
}



#ifdef CONFIG_X86_LOCAL_APIC

static u32 xen_apic_read(unsigned long reg)

static u32 xen_apic_read(u32 reg)

{

	return 0;

}



static void xen_apic_write(unsigned long reg, u32 val)

static void xen_apic_write(u32 reg, u32 val)

{

	/* Warn to see if there's any stray references */

	WARN_ON(1);

}



#ifdef CONFIG_X86_64

static u64 xen_apic_icr_read(void)

{

	return 0;

}



static void xen_apic_icr_write(u32 low, u32 id)

{

	/* Warn to see if there's any stray references */

	WARN_ON(1);

}



static void xen_apic_wait_icr_idle(void)

{

        return;

}



static struct apic_ops xen_basic_apic_ops = {

	.read = xen_apic_read,

	.write = xen_apic_write,

	.write_atomic = xen_apic_write,

	.icr_read = xen_apic_icr_read,

	.icr_write = xen_apic_icr_write,

	.wait_icr_idle = xen_apic_wait_icr_idle,

	.safe_wait_icr_idle = xen_apic_wait_icr_idle,

};

#endif



#endif



static void xen_flush_tlb(void)
@@ -1130,9 +1159,11 @@ static const struct pv_irq_ops xen_irq_ops __initdata = { 


static const struct pv_apic_ops xen_apic_ops __initdata = {

#ifdef CONFIG_X86_LOCAL_APIC

#ifndef CONFIG_X86_64

	.apic_write = xen_apic_write,

	.apic_write_atomic = xen_apic_write,

	.apic_read = xen_apic_read,

#endif

	.setup_boot_clock = paravirt_nop,

	.setup_secondary_clock = paravirt_nop,

	.startup_ipi_hook = paravirt_nop,
@@ -1291,6 +1322,12 @@ asmlinkage void __init xen_start_kernel(void) 
	pv_irq_ops = xen_irq_ops;

	pv_apic_ops = xen_apic_ops;

	pv_mmu_ops = xen_mmu_ops;

#ifdef CONFIG_X86_64

	/*

	 * for 64bit, set up the basic apic ops aswell.

	 */

	apic_ops = &xen_basic_apic_ops;

#endif



	if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {

		pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start;

include/asm-x86/paravirt.h

+8 −6
Original line number Diff line number Diff line
@@ -200,13 +200,15 @@ struct pv_irq_ops { 


struct pv_apic_ops {

#ifdef CONFIG_X86_LOCAL_APIC

#ifndef CONFIG_X86_64

	/*

	 * Direct APIC operations, principally for VMI.  Ideally

	 * these shouldn't be in this interface.

	 */

	void (*apic_write)(unsigned long reg, u32 v);

	void (*apic_write_atomic)(unsigned long reg, u32 v);

	u32 (*apic_read)(unsigned long reg);

	void (*apic_write)(u32 reg, u32 v);

	void (*apic_write_atomic)(u32 reg, u32 v);

	u32 (*apic_read)(u32 reg);

#endif

	void (*setup_boot_clock)(void);

	void (*setup_secondary_clock)(void);
@@ -892,17 +894,17 @@ static inline void slow_down_io(void) 
 * Basic functions accessing APICs.

 */

#ifndef CONFIG_X86_64

static inline void apic_write(unsigned long reg, u32 v)

static inline void apic_write(u32 reg, u32 v)

{

	PVOP_VCALL2(pv_apic_ops.apic_write, reg, v);

}



static inline void apic_write_atomic(unsigned long reg, u32 v)

static inline void apic_write_atomic(u32 reg, u32 v)

{

	PVOP_VCALL2(pv_apic_ops.apic_write_atomic, reg, v);

}



static inline u32 apic_read(unsigned long reg)

static inline u32 apic_read(u32 reg)

{

	return PVOP_CALL1(unsigned long, pv_apic_ops.apic_read, reg);

}