Commit ad4f5877 authored by Weili Qian's avatar Weili Qian Committed by openeuler-sync-bot
Browse files

crypto/trng: Remove the automatic loading of the hisi_trng driver 

driver inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I79JTN


CVE: NA

----------------------------------------------------------------------

On the current openEuler OS, when the OS is automatically started,
the hisi_trng_v2 device driver will be loaded because the algorithm
self-test needs to use random numbers.

However, the trng framework of community crypto requires that the
first loaded and used trng resource handle cannot be released, which
will cause hisi_trng_v2 to fail to unload the driver in subsequent
hisi trng module function processing.

The patch is modified by reducing the algorithm priority of the
hardware device driver. Not enabled in autotest and load. Only
reload this device driver for stand-alone use.

Signed-off-by: default avatarliulongfang <liulongfang@huawei.com>
Signed-off-by: default avatarJiangShui Yang <yangjiangshui@h-partners.com>
(cherry picked from commit fafc2e95)
parent 3739d280

drivers/crypto/hisilicon/trng/trng.c

+2 −1
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@ 
#define SW_DRBG_SEED(n)         (SW_DRBG_KEY_BASE - ((n) << SW_DRBG_NUM_SHIFT))

#define SW_DRBG_SEED_REGS_NUM	12

#define SW_DRBG_SEED_SIZE	48

#define SW_DRBG_CRYPTO_ALG_PRI 100

#define SW_DRBG_BLOCKS		0x0830

#define SW_DRBG_INIT		0x0834

#define SW_DRBG_GEN		0x083c
@@ -218,7 +219,7 @@ static struct rng_alg hisi_trng_alg = { 
	.base = {

		.cra_name = "stdrng",

		.cra_driver_name = "hisi_stdrng",

		.cra_priority = 300,

		.cra_priority = SW_DRBG_CRYPTO_ALG_PRI,

		.cra_ctxsize = sizeof(struct hisi_trng_ctx),

		.cra_module = THIS_MODULE,

		.cra_init = hisi_trng_init,