Commit ad3c2e17 authored by Pawan Gupta's avatar Pawan Gupta Committed by Borislav Petkov
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x86/events/intel: Do not deploy TSX force abort workaround when TSX is deprecated 



Earlier workaround added by

  400816f6 ("perf/x86/intel: Implement support for TSX Force Abort")

for perf counter interactions [1] are not required on some client
systems which received a microcode update that deprecates TSX.

Bypass the perf workaround when such microcode is enumerated.

[1] [ bp: Look for document ID 604224, "Performance Monitoring Impact
      of Intel Transactional Synchronization Extension Memory". Since
      there's no way for us to have stable links to documents... ]

 [ bp: Massage comment. ]

Signed-off-by: default avatarPawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Reviewed-by: default avatarThomas Gleixner <tglx@linutronix.de>
Reviewed-by: default avatarAndi Kleen <ak@linux.intel.com>
Reviewed-by: default avatarTony Luck <tony.luck@intel.com>
Tested-by: default avatarNeelima Krishnan <neelima.krishnan@intel.com>
Link: https://lkml.kernel.org/r/e4d410f786946280ced02dd07c74e0a74f1d10cb.1623704845.git-series.pawan.kumar.gupta@linux.intel.com
parent 1348924b

arch/x86/events/intel/core.c

+7 −1
Original line number Diff line number Diff line
@@ -6015,7 +6015,13 @@ __init int intel_pmu_init(void) 
		tsx_attr = hsw_tsx_events_attrs;

		intel_pmu_pebs_data_source_skl(pmem);



		if (boot_cpu_has(X86_FEATURE_TSX_FORCE_ABORT)) {

		/*

		 * Processors with CPUID.RTM_ALWAYS_ABORT have TSX deprecated by default.

		 * TSX force abort hooks are not required on these systems. Only deploy

		 * workaround when microcode has not enabled X86_FEATURE_RTM_ALWAYS_ABORT.

		 */

		if (boot_cpu_has(X86_FEATURE_TSX_FORCE_ABORT) &&

		   !boot_cpu_has(X86_FEATURE_RTM_ALWAYS_ABORT)) {

			x86_pmu.flags |= PMU_FL_TFA;

			x86_pmu.get_event_constraints = tfa_get_event_constraints;

			x86_pmu.enable_all = intel_tfa_pmu_enable_all;