Commit ad2f92c9 authored by José Roberto de Souza's avatar José Roberto de Souza Committed by Imre Deak
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drm/i915/xelpd: Fallback to plane stride limitations when using DPT 



GTT remapping allow us to have planes with strides larger than HW
supports but DPT + GTT remapping is still not properly handled so
falling back to plane HW limitations for now.

This patch can be dropped when DPT + GTT remapping is correctly
handled but until then we need this limitation for all display13
platforms to avoid pipe faults.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Clint Taylor <Clinton.A.Taylor@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Suggested-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210506161930.309688-6-imre.deak@intel.com
parent 33e7a975

drivers/gpu/drm/i915/display/intel_display.c

+7 −8
Original line number Diff line number Diff line
@@ -1607,16 +1607,15 @@ u32 intel_fb_max_stride(struct drm_i915_private *dev_priv, 
	 *

	 * The new CCS hash mode makes remapping impossible

	 */

	if (!is_ccs_modifier(modifier)) {

		if (DISPLAY_VER(dev_priv) >= 7)

	if (DISPLAY_VER(dev_priv) < 4 || is_ccs_modifier(modifier) ||

	    intel_modifier_uses_dpt(dev_priv, modifier))

		return intel_plane_fb_max_stride(dev_priv, pixel_format, modifier);

	else if (DISPLAY_VER(dev_priv) >= 7)

		return 256 * 1024;

		else if (DISPLAY_VER(dev_priv) >= 4)

	else

		return 128 * 1024;

}



	return intel_plane_fb_max_stride(dev_priv, pixel_format, modifier);

}



static u32

intel_fb_stride_alignment(const struct drm_framebuffer *fb, int color_plane)

{

drivers/gpu/drm/i915/display/intel_display_types.h

+6 −2
Original line number Diff line number Diff line
@@ -1975,10 +1975,14 @@ intel_wait_for_vblank_if_active(struct drm_i915_private *dev_priv, enum pipe pip 
		intel_wait_for_vblank(dev_priv, pipe);

}



static inline bool intel_modifier_uses_dpt(struct drm_i915_private *i915, u64 modifier)

{

	return DISPLAY_VER(i915) >= 13 && modifier != DRM_FORMAT_MOD_LINEAR;

}



static inline bool intel_fb_uses_dpt(const struct drm_framebuffer *fb)

{

	return fb && DISPLAY_VER(to_i915(fb->dev)) >= 13 &&

		fb->modifier != DRM_FORMAT_MOD_LINEAR;

	return fb && intel_modifier_uses_dpt(to_i915(fb->dev), fb->modifier);

}



static inline u32 intel_plane_ggtt_offset(const struct intel_plane_state *plane_state)