Merge tag 'sh-pfc-for-v5.9-tag2' of... (ad05d4b4) · Commits · EulixOS / Software / Kernel

Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt

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Original line number	Diff line number	Diff line
		@@ -21,6 +21,7 @@ Required Properties:
		- "renesas,pfc-r8a774a1": for R8A774A1 (RZ/G2M) compatible pin-controller.
		- "renesas,pfc-r8a774b1": for R8A774B1 (RZ/G2N) compatible pin-controller.
		- "renesas,pfc-r8a774c0": for R8A774C0 (RZ/G2E) compatible pin-controller.
		- "renesas,pfc-r8a774e1": for R8A774E1 (RZ/G2H) compatible pin-controller.
		- "renesas,pfc-r8a7778": for R8A7778 (R-Car M1) compatible pin-controller.
		- "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller.
		- "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-controller.

Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.txt

deleted100644 → 0

+0 −87

Original line number	Diff line number	Diff line
		Renesas RZ/A2 combined Pin and GPIO controller

		The Renesas SoCs of the RZ/A2 series feature a combined Pin and GPIO controller.
		Pin multiplexing and GPIO configuration is performed on a per-pin basis.
		Each port features up to 8 pins, each of them configurable for GPIO
		function (port mode) or in alternate function mode.
		Up to 8 different alternate function modes exist for each single pin.

		Pin controller node
		-------------------

		Required properties:
		- compatible: shall be:
		- "renesas,r7s9210-pinctrl": for RZ/A2M
		- reg
		Address base and length of the memory area where the pin controller
		hardware is mapped to.
		- gpio-controller
		This pin controller also controls pins as GPIO
		- #gpio-cells
		Must be 2
		- gpio-ranges
		Expresses the total number of GPIO ports/pins in this SoC

		Example: Pin controller node for RZ/A2M SoC (r7s9210)

		pinctrl: pin-controller@fcffe000 {
		compatible = "renesas,r7s9210-pinctrl";
		reg = <0xfcffe000 0x1000>;

		gpio-controller;
		#gpio-cells = <2>;
		gpio-ranges = <&pinctrl 0 0 176>;
		};

		Sub-nodes
		---------

		The child nodes of the pin controller designate pins to be used for
		specific peripheral functions or as GPIO.

		- Pin multiplexing sub-nodes:
		A pin multiplexing sub-node describes how to configure a set of
		(or a single) pin in some desired alternate function mode.
		The values for the pinmux properties are a combination of port name, pin
		number and the desired function index. Use the RZA2_PINMUX macro located
		in include/dt-bindings/pinctrl/r7s9210-pinctrl.h to easily define these.
		For assigning GPIO pins, use the macro RZA2_PIN also in r7s9210-pinctrl.h
		to express the desired port pin.

		Required properties:
		- pinmux:
		integer array representing pin number and pin multiplexing configuration.
		When a pin has to be configured in alternate function mode, use this
		property to identify the pin by its global index, and provide its
		alternate function configuration number along with it.
		When multiple pins are required to be configured as part of the same
		alternate function they shall be specified as members of the same
		argument list of a single "pinmux" property.
		Helper macros to ease assembling the pin index from its position
		(port where it sits on and pin number) and alternate function identifier
		are provided by the pin controller header file at:
		<dt-bindings/pinctrl/r7s9210-pinctrl.h>
		Integers values in "pinmux" argument list are assembled as:
		((PORT * 8 + PIN) \| MUX_FUNC << 16)

		Example: Board specific pins configuration

		&pinctrl {
		/* Serial Console */
		scif4_pins: serial4 {
		pinmux = <RZA2_PINMUX(PORT9, 0, 4)>, /* TxD4 */
		<RZA2_PINMUX(PORT9, 1, 4)>; /* RxD4 */
		};
		};

		Example: Assigning a GPIO:

		leds {
		status = "okay";
		compatible = "gpio-leds";

		led0 {
		/* P6_0 */
		gpios = <&pinctrl RZA2_PIN(PORT6, 0) GPIO_ACTIVE_HIGH>;
		};
		};

Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml

0 → 100644

+100 −0

Original line number	Diff line number	Diff line
		# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
		%YAML 1.2
		---
		$id: http://devicetree.org/schemas/pinctrl/renesas,rza2-pinctrl.yaml#
		$schema: http://devicetree.org/meta-schemas/core.yaml#

		title: Renesas RZ/A2 combined Pin and GPIO controller

		maintainers:
		- Chris Brandt <chris.brandt@renesas.com>
		- Geert Uytterhoeven <geert+renesas@glider.be>

		description:
		The Renesas SoCs of the RZ/A2 series feature a combined Pin and GPIO
		controller.
		Pin multiplexing and GPIO configuration is performed on a per-pin basis.
		Each port features up to 8 pins, each of them configurable for GPIO function
		(port mode) or in alternate function mode.
		Up to 8 different alternate function modes exist for each single pin.

		properties:
		compatible:
		const: "renesas,r7s9210-pinctrl" # RZ/A2M

		reg:
		maxItems: 1

		gpio-controller: true

		'#gpio-cells':
		const: 2
		description:
		The first cell contains the global GPIO port index, constructed using the
		RZA2_PIN() helper macro in r7s9210-pinctrl.h.
		E.g. "RZA2_PIN(PORT6, 0)" for P6_0.

		gpio-ranges:
		maxItems: 1

		patternProperties:
		"^.*$":
		if:
		type: object
		then:
		allOf:
		- $ref: pincfg-node.yaml#
		- $ref: pinmux-node.yaml#
		description:
		The child nodes of the pin controller designate pins to be used for
		specific peripheral functions or as GPIO.

		A pin multiplexing sub-node describes how to configure a set of
		(or a single) pin in some desired alternate function mode.
		The values for the pinmux properties are a combination of port name,
		pin number and the desired function index. Use the RZA2_PINMUX macro
		located in include/dt-bindings/pinctrl/r7s9210-pinctrl.h to easily
		define these.
		For assigning GPIO pins, use the macro RZA2_PIN also in
		to express the desired port pin.

		properties:
		phandle: true

		pinmux:
		description:
		Values are constructed from GPIO port number, pin number, and
		alternate function configuration number using the RZA2_PINMUX()
		helper macro in r7s9210-pinctrl.h.

		required:
		- pinmux

		additionalProperties: false

		required:
		- compatible
		- reg
		- gpio-controller
		- '#gpio-cells'
		- gpio-ranges

		additionalProperties: false

		examples:
		- \|
		#include <dt-bindings/pinctrl/r7s9210-pinctrl.h>
		pinctrl: pin-controller@fcffe000 {
		compatible = "renesas,r7s9210-pinctrl";
		reg = <0xfcffe000 0x1000>;

		gpio-controller;
		#gpio-cells = <2>;
		gpio-ranges = <&pinctrl 0 0 176>;

		/* Serial Console */
		scif4_pins: serial4 {
		pinmux = <RZA2_PINMUX(PORT9, 0, 4)>, /* TxD4 */
		<RZA2_PINMUX(PORT9, 1, 4)>; /* RxD4 */
		};
		};

drivers/pinctrl/pinctrl-rza1.c

+12 −12

Original line number	Diff line number	Diff line
		@@ -75,7 +75,7 @@
		* RZ/A1 pinmux flags
		*/

		/**
		/*
		* rza1_bidir_pin - describe a single pin that needs bidir flag applied.
		*/
		struct rza1_bidir_pin {
		@@ -83,7 +83,7 @@ struct rza1_bidir_pin {
		u8 func: 4;
		};

		/**
		/*
		* rza1_bidir_entry - describe a list of pins that needs bidir flag applied.
		* Each struct rza1_bidir_entry describes a port.
		*/
		@@ -92,7 +92,7 @@ struct rza1_bidir_entry {
		const struct rza1_bidir_pin *pins;
		};

		/**
		/*
		* rza1_swio_pin - describe a single pin that needs swio flag applied.
		*/
		struct rza1_swio_pin {
		@@ -102,7 +102,7 @@ struct rza1_swio_pin {
		u16 input: 1;
		};

		/**
		/*
		* rza1_swio_entry - describe a list of pins that needs swio flag applied
		*/
		struct rza1_swio_entry {
		@@ -110,7 +110,7 @@ struct rza1_swio_entry {
		const struct rza1_swio_pin *pins;
		};

		/**
		/*
		* rza1_pinmux_conf - group together bidir and swio pinmux flag tables
		*/
		struct rza1_pinmux_conf {
		@@ -431,7 +431,7 @@ static const struct rza1_pinmux_conf rza1l_pmx_conf = {
		* RZ/A1 types
		*/
		/**
		* rza1_mux_conf - describes a pin multiplexing operation
		* struct rza1_mux_conf - describes a pin multiplexing operation
		*
		* @id: the pin identifier from 0 to RZA1_NPINS
		* @port: the port where pin sits on
		@@ -450,7 +450,7 @@ struct rza1_mux_conf {
		};

		/**
		* rza1_port - describes a pin port
		* struct rza1_port - describes a pin port
		*
		* This is mostly useful to lock register writes per-bank and not globally.
		*
		@@ -467,12 +467,12 @@ struct rza1_port {
		};

		/**
		* rza1_pinctrl - RZ pincontroller device
		* struct rza1_pinctrl - RZ pincontroller device
		*
		* @dev: parent device structure
		* @mutex: protect [pinctrl\|pinmux]_generic functions
		* @base: logical address base
		* @nports: number of pin controller ports
		* @nport: number of pin controller ports
		* @ports: pin controller banks
		* @pins: pin array for pinctrl core
		* @desc: pincontroller desc for pinctrl core
		@@ -536,7 +536,7 @@ static inline int rza1_pinmux_get_swio(unsigned int port,
		return -ENOENT;
		}

		/**
		/*
		* rza1_pinmux_get_flags() - return pinmux flags associated to a pin
		*/
		static unsigned int rza1_pinmux_get_flags(unsigned int port, unsigned int pin,
		@@ -566,7 +566,7 @@ static unsigned int rza1_pinmux_get_flags(unsigned int port, unsigned int pin,
		* RZ/A1 SoC operations
		*/

		/**
		/*
		* rza1_set_bit() - un-locked set/clear a single bit in pin configuration
		* registers
		*/
		@@ -664,7 +664,7 @@ static inline int rza1_pin_get(struct rza1_port *port, unsigned int pin)
		/**
		* rza1_pin_mux_single() - configure pin multiplexing on a single pin
		*
		* @pinctrl: RZ/A1 pin controller device
		* @rza1_pctl: RZ/A1 pin controller device
		* @mux_conf: pin multiplexing descriptor
		*/
		static int rza1_pin_mux_single(struct rza1_pinctrl *rza1_pctl,

drivers/pinctrl/sh-pfc/Kconfig

+4 −0

Original line number	Diff line number	Diff line
		@@ -20,6 +20,7 @@ config PINCTRL_SH_PFC
		select PINCTRL_PFC_R8A774A1 if ARCH_R8A774A1
		select PINCTRL_PFC_R8A774B1 if ARCH_R8A774B1
		select PINCTRL_PFC_R8A774C0 if ARCH_R8A774C0
		select PINCTRL_PFC_R8A774E1 if ARCH_R8A774E1
		select PINCTRL_PFC_R8A7778 if ARCH_R8A7778
		select PINCTRL_PFC_R8A7779 if ARCH_R8A7779
		select PINCTRL_PFC_R8A7790 if ARCH_R8A7790
		@@ -99,6 +100,9 @@ config PINCTRL_PFC_R8A774B1
		config PINCTRL_PFC_R8A774C0
		bool "RZ/G2E pin control support" if COMPILE_TEST

		config PINCTRL_PFC_R8A774E1
		bool "RZ/G2H pin control support" if COMPILE_TEST

		config PINCTRL_PFC_R8A7778
		bool "R-Car M1A pin control support" if COMPILE_TEST