dt-bindings: pinctrl: convert Broadcom Northstar to the json-schema

Broadcom Northstar pins mux controller

Some of Northstar SoCs's pins can be used for various purposes thanks to the mux

controller. This binding allows describing mux controller and listing available

functions. They can be referenced later by other bindings to let system

configure controller correctly.

A list of pins varies across chipsets so few bindings are available.

Node of the pinmux must be nested in the CRU (Central Resource Unit) "syscon"

noce.

Required properties:

- compatible: must be one of:

	"brcm,bcm4708-pinmux"

	"brcm,bcm4709-pinmux"

	"brcm,bcm53012-pinmux"

- offset: offset of pin registers in the CRU block

Functions and their groups available for all chipsets:

- "spi": "spi_grp"

- "i2c": "i2c_grp"

- "pwm": "pwm0_grp", "pwm1_grp", "pwm2_grp", "pwm3_grp"

- "uart1": "uart1_grp"

Additionally available on BCM4709 and BCM53012:

- "mdio": "mdio_grp"

- "uart2": "uart2_grp"

- "sdio": "sdio_pwr_grp", "sdio_1p8v_grp"

For documentation of subnodes see:

Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt

Example:

	dmu@1800c000 {

		compatible = "simple-bus";

		ranges = <0 0x1800c000 0x1000>;

		#address-cells = <1>;

		#size-cells = <1>;

		cru@100 {

			compatible = "syscon", "simple-mfd";

			reg = <0x100 0x1a4>;

			pinctrl {

				compatible = "brcm,bcm4708-pinmux";

				offset = <0xc0>;

				spi-pins {

					function = "spi";

					groups = "spi_grp";

				};

			};

		};

	};

# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/pinctrl/brcm,ns-pinmux.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Broadcom Northstar pins mux controller

maintainers:

  - Rafał Miłecki <rafal@milecki.pl>

description:

  Some of Northstar SoCs's pins can be used for various purposes thanks to the

  mux controller. This binding allows describing mux controller and listing

  available functions. They can be referenced later by other bindings to let

  system configure controller correctly.

  A list of pins varies across chipsets so few bindings are available.

  Node of the pinmux must be nested in the CRU (Central Resource Unit) "syscon"

  node.

properties:

  compatible:

    enum:

      - brcm,bcm4708-pinmux

      - brcm,bcm4709-pinmux

      - brcm,bcm53012-pinmux

  offset:

    description: offset of pin registers in the CRU block

    maxItems: 1

    $ref: /schemas/types.yaml#/definitions/uint32-array

patternProperties:

  '-pins$':

    type: object

    description: pin node

    $ref: pinmux-node.yaml#

    properties:

      function:

        enum: [ spi, i2c, pwm, uart1, mdio, uart2, sdio ]

      groups:

        minItems: 1

        maxItems: 4

        items:

          enum: [ spi_grp, i2c_grp, pwm0_grp, pwm1_grp, pwm2_grp, pwm3_grp,

                  uart1_grp, mdio_grp, uart2_grp, sdio_pwr_grp, sdio_1p8v_grp ]

    required:

      - function

      - groups

    additionalProperties: false

allOf:

  - if:

      properties:

        compatible:

          contains:

            const: brcm,bcm4708-pinmux

    then:

      patternProperties:

        '-pins$':

          properties:

            function:

              enum: [ spi, i2c, pwm, uart1 ]

            groups:

              items:

                enum: [ spi_grp, i2c_grp, pwm0_grp, pwm1_grp, pwm2_grp, pwm3_grp,

                        uart1_grp ]

required:

  - offset

additionalProperties: false

examples:

  - |

    cru@1800c100 {

        compatible = "syscon", "simple-mfd";

        reg = <0x1800c100 0x1a4>;

        pinctrl {

            compatible = "brcm,bcm4708-pinmux";

            offset = <0xc0>;

            spi-pins {

                function = "spi";

                groups = "spi_grp";

            };

        };

    };